Difference between revisions of "Restoring U-Boot on SPI NOR flash (BELK/BXELK)"

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Hit ENTER within 3 seconds to stop autoboot
 
Hit ENTER within 3 seconds to stop autoboot
 
</pre>
 
</pre>
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==Notes about BELK 3.x.x/BXELK 1.x.x and older==
 +
Until BELK 3.x.x/BXELK 1.x.x, a little bit different partitioning scheme was used. It is illustrated in the following picture.
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 +
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[[File:BELK-NOR-flash-partitioning-3.x.x.png|thumb|center|600px|caption]]
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This is due to the fact that those kits made use of the FSBL. Consquently, the header required by the Zynq'a bootrom and the FSBL binary image were stored at the bottom of the NOR flash. BELK 4.x.x and BXELK 2.x.x and newer are based on U-Boot SPL, instead. The U-Boot SPL binary image includes the header as well. This leads to a different partitioning.

Revision as of 11:52, 30 January 2020

Info Box
Bora5-small.jpg Applies to Bora
BORA Xpress.png Applies to BORA Xpress


Introduction[edit | edit source]

This article describes how to restore U-Boot on SPI NOR flash in case it gets corrupted or it is deleted accidentally.

The example refers to BoraXEVB carrier board but the procedure is the same for BoraEVB board as well. The procedure was tested with the binaries released with BXELK 2.0.0. As such, it is valid for BELK 4.x as well.

At the end of the procedure, the default partitioning of the NOR flash will be restored. It is depicted in the following image.


NOR flash default partitioning scheme

Instructions[edit | edit source]

First of all, create a bootable microSD card as described here.

Then, boot the board with the microSD card and stop automatic boot process of U-Boot in order to access the console.

U-Boot SPL 2017.01-belk-4.0.0-rc1 (Jul 03 2017 - 01:00:18)
mmc boot
Trying to boot from MMC1
reading fpga.bit
spl_load_image_fat: error reading image fpga.bit, err - -1
spl: error reading image fpga.bit, err - 1
reading u-boot.img
reading u-boot.img


U-Boot 2017.01-belk-4.0.0-rc1 (Jul 03 2017 - 01:00:18 +0200)

Model: Bora
Board: Xilinx Zynq
I2C:   ready
DRAM:  ECC disabled 1 GiB
Relocating to 3ff2e000, new gd at 3eaedee8, sp at 3eaedec0
NAND:  1024 MiB
MMC:   sdhci@e0100000: 0 (SD)
reading bora.env

** Unable to read "bora.env" from mmc0:1 **
Using default environment

In:    serial@e0001000
Out:   serial@e0001000
Err:   serial@e0001000
Model: Bora
Board: Xilinx Zynq
SF: Detected s25fl128s_64k with page size 256 Bytes, erase size 64 KiB, total 32 MiB
SF: Detected s25fl128s_64k with page size 256 Bytes, erase size 64 KiB, total 32 MiB
SOM ConfigID#: 00000004
SOM UniqueID#: 2a0e92c4:03193a4b
ds2431_readmem(): error in chip reset
ds2431_readmem(): error in reading buffer
ds2431_readmem(): error in chip reset
ds2431_readmem(): error in reading buffer
CB ConfigID CRC mismatch for 0x00000000 (was 0x00000000, expected 0x2144df1c) at block 3 (offset 96): using default
CB ConfigID#: ffffffff
CB UniqueID#: 00000000:00000000
Net:   ZYNQ GEM: e000b000, phyaddr 7, interface rgmii-id
eth0: ethernet@e000b000
Hit ENTER within 3 seconds to stop autoboot
Bora>


Download via TFTP the U-Boot SPL and the U-Boot binary images. Then, burn them in NOR flash memory.

Bora> setenv ipaddr 192.168.0.81
Bora> setenv ethaddr 00:50:C2:1E:AF:B3
Bora> setenv serverip 192.168.0.23
Bora> tftpboot ${loadaddr} borax/boot.bin
Using ethernet@e000b000 device
TFTP from server 192.168.0.23; our IP address is 192.168.0.81
Filename 'borax/boot.bin'.
Load address: 0x2080000
Loading: ##################
         2.2 MiB/s
done
Bytes transferred = 88876 (15b2c hex)
Bora> run update_spl
SF: Detected s25fl128s_64k with page size 256 Bytes, erase size 64 KiB, total 32 MiB
SF: 131072 bytes @ 0x0 Erased: OK
device 0 offset 0x0, size 0x15b2c
SF: 88876 bytes @ 0x0 Written: OK
Bora> tftpboot ${loadaddr} borax/u-boot.img
Using ethernet@e000b000 device
TFTP from server 192.168.0.23; our IP address is 192.168.0.81
Filename 'borax/u-boot.img'.
Load address: 0x2080000
Loading: #################################################################
         ################################################
         2 MiB/s
done
Bytes transferred = 577256 (8cee8 hex)
Bora> run update
SF: Detected s25fl128s_64k with page size 256 Bytes, erase size 64 KiB, total 32 MiB
SF: 589824 bytes @ 0x40000 Erased: OK
device 0 offset 0x40000, size 0x8cee8
SF: 577256 bytes @ 0x40000 Written: OK
Bora>


Select the SPI NOR flash as boot device, remove the microSD card, and reset the board. The board should boot off the NOR flash as shown in the following image.

Bora> reset
resetting ...

U-Boot SPL 2017.01-belk-4.0.0-rc1 (Jul 03 2017 - 01:00:18)
qspi boot
Trying to boot from SPI


U-Boot 2017.01-belk-4.0.0-rc1 (Jul 03 2017 - 01:00:18 +0200)

Model: Bora
Board: Xilinx Zynq
I2C:   ready
DRAM:  ECC disabled 1 GiB
Relocating to 3ff2e000, new gd at 3eaedee8, sp at 3eaedec0
NAND:  1024 MiB
MMC:   Card did not respond to voltage select!
Card did not respond to voltage select!
sdhci@e0100000 - probe failed: -95
Card did not respond to voltage select!

Card did not respond to voltage select!
** Bad device mmc 0 **
Using default environment

In:    serial@e0001000
Out:   serial@e0001000
Err:   serial@e0001000
Model: Bora
Board: Xilinx Zynq
SF: Detected s25fl128s_64k with page size 256 Bytes, erase size 64 KiB, total 32 MiB
SF: Detected s25fl128s_64k with page size 256 Bytes, erase size 64 KiB, total 32 MiB
SOM ConfigID#: 00000004
SOM UniqueID#: 2a0e92c4:03193a4b
ds2431_readmem(): error in chip reset
ds2431_readmem(): error in reading buffer
ds2431_readmem(): error in chip reset
ds2431_readmem(): error in reading buffer
CB ConfigID CRC mismatch for 0x00000000 (was 0x00000000, expected 0x2144df1c) at block 3 (offset 96): using default
CB ConfigID#: ffffffff
CB UniqueID#: 00000000:00000000
Net:   ZYNQ GEM: e000b000, phyaddr 7, interface rgmii-id
eth0: ethernet@e000b000
Hit ENTER within 3 seconds to stop autoboot

Notes about BELK 3.x.x/BXELK 1.x.x and older[edit | edit source]

Until BELK 3.x.x/BXELK 1.x.x, a little bit different partitioning scheme was used. It is illustrated in the following picture.


caption


This is due to the fact that those kits made use of the FSBL. Consquently, the header required by the Zynq'a bootrom and the FSBL binary image were stored at the bottom of the NOR flash. BELK 4.x.x and BXELK 2.x.x and newer are based on U-Boot SPL, instead. The U-Boot SPL binary image includes the header as well. This leads to a different partitioning.