Difference between revisions of "Power supply unit (PSU) and voltage domains (SBC Lynx)"

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(Power sequencing)
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[2] AUX_5V is generated by a 600mA boost DC/DC converter. As this converter powers USB devices connected to J47 and J48 - if any - and DWM WiFi/Bluetooth module (if populated), maximum current available at connector J54 can not be provided.
 
[2] AUX_5V is generated by a 600mA boost DC/DC converter. As this converter powers USB devices connected to J47 and J48 - if any - and DWM WiFi/Bluetooth module (if populated), maximum current available at connector J54 can not be provided.
 
==Power sequencing==
 
==Power sequencing==
In case additional circuitry has to interfaced to processor's I/Os [1], '''proper power sequencing must be implemented''' in order to avoid back power phenomena. To do that, AUX_3.3V should be used:
+
In case additional circuitry has to interfaced to processor's I/Os [1], '''proper power sequencing should be implemented''' in order to avoid back power phenomena. To do that, AUX_3.3V should be used:
 
* additional circuitry can be powered by AUX_3.3V directly
 
* additional circuitry can be powered by AUX_3.3V directly
 
*AUX_3.3V can be used as enable signal to power-up this circuitry.
 
*AUX_3.3V can be used as enable signal to power-up this circuitry.

Revision as of 10:55, 25 November 2016

Info Box
SBC Lynx-top.png Applies to SBC Lynx


WorkInProgress.gif


Introduction[edit | edit source]

SBC Lynx implements a complex power tree to supply NXP iMX6UL application processor and surrounding peripherals.

SBC Lynx user does not to need to fully understand the complexity of such tree. However, he/she needs to comprehend the basic structure of power supply unit (PSU) and voltage domains, in order to interface external devices and to implement add-on boards properly.

PSU structure and voltage domains organization[edit | edit source]

The following image shows the PSU structure and the voltage domains organization of SBC Lynx.


PSU structure and voltage domains organization


SBC Lynx in powered by one rail whose voltage is in the 5 - 24V range. This supply voltage can be provided via:

The heart of the PSU consists of NXP PF3000 PMIC that generates all of the power supplies required by the iMX6UL application processor and surrounding peripherals. For system integrator, just few of these supplies are relevant to interface additional devices. They are depicted in the image above where are denoted by red arrows. Black arrows refer to the signals instead. For each black arrow, the voltage domain is indicated. For instance, the signals routed to the connector J53 belong to IO_3.3V voltage domain. Relevant voltage domains are listed in the following table.

Domain name Nominal voltage [V] Notes
IO_3.3V 3.3
ADC_3.3V 3.3
CAN_3.3V 3.3
VIN_5_24V n/a Dependent on main power supply voltage
SNVS TBD

Two of the supplies generated by PMIC are available to power external devices or add-on boards.

Power supply/domain name Nominal voltage [V] Maximum current [A] Routing Notes
AUX_3.3V 3.3 1A J54, J52+J45 [1]
AUX_5V 5.0 n/a J54 [2]

[1] Even if nominal maximum current is 1A, actual current availability may be limited by the current sourcing capability (2A) of the DC/DC feeding PF3000 PMIC. System integrator has to assess load balancing carefully, based on the configuration of the entire application (USB loads, processor computation, WiFi/Bluetooth module etc.).

[2] AUX_5V is generated by a 600mA boost DC/DC converter. As this converter powers USB devices connected to J47 and J48 - if any - and DWM WiFi/Bluetooth module (if populated), maximum current available at connector J54 can not be provided.

Power sequencing[edit | edit source]

In case additional circuitry has to interfaced to processor's I/Os [1], proper power sequencing should be implemented in order to avoid back power phenomena. To do that, AUX_3.3V should be used:

  • additional circuitry can be powered by AUX_3.3V directly
  • AUX_3.3V can be used as enable signal to power-up this circuitry.

Either way, this ensures additional circuitry power-on sequence is compliant with processors requirements.


[1] For instance by the use of add-on boards interfaced to mezzanine or one-piece connectors.