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Power consumption (Bora)

5 bytes added, 07:24, 12 October 2018
Introduction
For this reason, several real use cases have been considered rather than indicating a theoretical maximum power consumption value that would be useless for the majority of system integrators, because it likely would lead to an oversized power supply unit.
Again, it is worth to remember that Bora platform is so flexible that is practically impossible to test for all possible configurations and applications on the market. The use cases here presented should cover most of real-world scenarios. However , actual customer application might require more power than values reported here. Generally speaking, application specific requirements have to be taken into consideration in order to size the power supply unit and to implement thermal management properly.
The following sections describe in details the test beds that have been used. All of them make use of a specific FPGA bistream that has been developed to perform stress tests on Bora platforms [1]. These tests have been conducted in a climatic chamber that allows to set setting environment temperature surrounding DUT, denoted in the rest of the document as Tamb. Tj denotes Zynq's junction temperature instead.
FPGA bitstream - that in turn is built upon [http://opencores.org/project,highload this core] - allocates most of FPGA resources. All of them are clocked by one clock signal whose frequency is selectable by the PS at runtime. This allows to flexibly change DUT current absorption and, consequently, the heat it generates.
[1] These tests are part of the standard qualification procedure of DAVE Embedded Systems products. Their primary goal is to verify the proper operating of the DUT under conditions of usage that are extremely demanding. Data reported here reported have been were excerpted from the logs generated by such tests.
==Configuration #1==
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