Changes

Providing theoretical maximum power consumption value would be useless for the majority of a system designers building their application upon Bora -on-module (SOM for short) is virtually impossible because, it is extremely hard to define the worst case. This is even more true in most casescase of Bora, where this would lead to an oversized power supply unitis affected by the software running on Processing System (PS) side and the Programmable Logic (PL) configuration.

Several configurations have been tested in order to provide figures that are measured on For this reason, several real-world use cases instead. Please note have been considered rather than indicating a theoretical maximum power consumption value that Bora platform is so flexible that is virtually impossible to test would be useless for all possible configurations and applications on the market. The use cases here presented should cover most majority of real-world scenarios. However actual customer application might require more power than values reported here. Generally speakingsystem integrators, application specific requirements have because it likely would lead to be taken into consideration in order to size an oversized power supply unit and to implement thermal management properly.

The following sections describe in details Again, it is worth to remember that Bora platform is so flexible that is virtually impossible to test for all possible configurations and applications on the test beds that have been usedmarket. All of them make The use cases here presented should cover most of a real-world scenarios. However actual customer application might require more power than values reported here. Generally speaking, application specific FPGA bistream that has been developed requirements have to perform stress tests on Bora platforms [1]. These tests are conducted be taken into consideration in a climatic chamber that allows order to size power supply unit and to set environment temperature surrounding DUT, denoted in the rest of the document as Tamb. Tj denotes Zynq's junction temperature insteadimplement thermal management properly.

FPGA bitstream - The following sections describe in details the test beds that in turn is built upon [http://opencores.org/project,highload this core] - allocates most of FPGA resourceshave been used. All of them are clocked by one clock signal whose frequency is selectable by processor - also denoted as Processing System or PS for short - at runtimemake use of a specific FPGA bistream that has been developed to perform stress tests on Bora platforms [1]. This These tests have been conducted in a climatic chamber that allows to flexibly change set environment temperature surrounding DUT current absorption and, consequently, generated heatdenoted in the rest of the document as Tamb. Tj denotes Zynq's junction temperature instead.

 [1] These tests are part of the standard qualification procedure of DAVE Embedded Systems products. Their primary goal ois to verify proper operating of the DUT under extremely heavy conditions of usage. Data here reported have been excerpted from the logs generated by such tests.