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Power consumption (Bora)

1,073 bytes added, 08:26, 28 October 2021
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{{Applies To Bora}}
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==Introduction==
Providing theoretical maximum power consumption value would be useless for the majority of system designers building their application upon Bora module because, in most cases, this would lead to an oversized power supply unit.
Several configurations have been tested in order to provide figures that are measured <section begin=Body/>==Electrical Thermal management and heat dissipation==Providing maximum power consumption of a system-on real-world use cases instead. Please note that Bora platform is so flexible that module (SOM for short) is virtually impossible because it is extremely hard to test for all possible configurations and applications on define the marketworst case. The use cases here presented should cover most This is even more true in case of real-world scenarios. However actual customer application might require more power than values reported here. Generally speakingBora, application specific requirements have to be taken into consideration in order to size power supply unit where this is affected by the software running on Processing System (PS) side and to implement thermal management properlythe Programmable Logic (PL) configuration.
The following sections describe in details the test beds that For this reason, several real use cases have been used. All of them make use of a specific FPGA bistream that has been developed to perform stress tests on Bora platforms [1]. These tests are condicted in considered rather than indicating a climatic chamber theoretical maximum power consumption value that allows to set environment temperature surrounding DUT, denoted in would be useless for the rest majority of the document as Tamb. Tj denotes Zynq's junction temperature insteadsystem integrators, because it likely would lead to an oversized power supply unit.
FPGA bitstream - Again, it is worth remembering that Bora platform is so flexible that in turn is built upon [http://opencorespractically impossible to test for all possible configurations and applications on the market.org/project,highload this core] - allocates The use cases here presented should cover most of FPGA resourcesthe real-world scenarios. All of them are clocked by one clock signal whose frequency is selectable by processor However, actual customer application might require more power than values reported here. Generally speaking, application- also denoted as Processing System or PS for short - at runtime. This allows specific requirements have to be taken into consideration in order to flexibly change DUT current absorption size the power supply unit and, consequently, generated heatto implement thermal management properly.
The following sections describe in detail the testbeds that have been used. All of them make use of a specific FPGA bistream that has been developed to perform stress tests on Bora platforms [1]. These tests have been conducted in a climatic chamber that allows setting environment temperature surrounding DUT, denoted in the rest of the document as Tamb. Tj denotes Zynq's junction temperature instead.
FPGA bitstream - that in turn is built upon [http://opencores.org/project,highload this core] - allocates most of FPGA resources. All of them are clocked by one clock signal whose frequency is selectable by the PS at runtime. This allows to flexibly change DUT current absorption and, consequently, the heat it generates.
For information related to temperature measurements, see also [[Physical_devices_mapping_(BELK/BXELK)#Temperature_sensors|this section]].   [1] These tests are part of the standard qualification procedure of DAVE Embedded Systems products. Their primary goal is to verify the proper operating of the DUT under extremely heavy conditions of usagethat are extremely demanding. Data reported here reported have been were excerpted from the logs generated by such tests. ===Configuration #1=======Testbed====
Measurements have been performed on the following platform:
* Bora SOM: DBRD5110I1R
**this model is based on Zynq XC7Z020-1I (Tj: '''-40°C / +100°C''')
* carrier board: [[BoraEVB]]
* processor frequency: '''667 MHz'''
* FPGA frequency
**30 MHz (Tamb = +85°C)
Please note that, when Tamb has been set to +85°C, the Bora SOM has been coupled to a passive heat sink to prevent exceeding maximum Zynq's junction temperature.
At the application level, PS executes concurrently several tasks including:*two instances of [https://github.com/Explorer09/cpustress-sources/blob/master/cpuburn/cpuburn-1.4a/ARM/burnCortexA9.s <code>burnCortexA9</code>]
*periodic reading of I2C RTC (Maxim DS3232M)
*periodic reading of Zynq's ADCs
*periodic reading of voltage/current probe (Texas Instruments INA226) connected to the SOM's power rail
*one instance of [http://pyropus.ca/software/memtester/ <code>memtester</code> over ], exercising 50 MByte of SDRAM
*endless loop of writing/reading/verifying operations on microSD card
*periodic reading of I2C remote temperature sensor (TExas Texas Instruments TMP421)*endless loop of writing/reading/verifying operations on memory stick connected to the USB port.====Results====
*Tamb: temperature of the ambient surrounding the DUT
*Tj_max: maximum Zynq's junction temperature measured during the test
|}
[1] In spite of the use of heat sink, this value exceeds maximum valued declared by the manufacturer. This is acceptable in case of stress tests, where it is possible that the parts of the DUT get damaged.
===Configuration #2=======Testbed====
Measurements have been performed on the following platform:
* Bora SOM: DBRF5110C1R
**this model is based on Zynq XC7Z020-3E (Tj: '''0 / +100°C''')
* carrier board: [[BoraEVB]]
* processor frequency: '''867 MHz'''
* FPGA frequency
**10 MHz (Tamb = +75°C)
At application level, PS executes concurrently several tasks including:
*two instances of [https://github.com/Explorer09/cpustress-sources/blob/master/cpuburn/cpuburn-1.4a/ARM/burnCortexA9.s <code>burnCortexA9</code>]
*periodic reading of I2C RTC (Maxim DS3232M)
*periodic reading of Zynq's ADCs
*periodic reading of voltage/current probe (Texas Instruments INA226) connected to the SOM's power rail
*one instance of [http://pyropus.ca/software/memtester/ <code>memtester</code> over ], exercising 50 MByte of SDRAM
*endless loop of writing/reading/verifying operations on microSD card
*periodic reading of I2C remote temperature sensor (TExas Instruments TMP421)
*endless loop of writing/reading/verifying operations on memory stick connected to USB port.
====Results====
*Tamb: temperature of the ambient surrounding the DUT
*Tj_max: maximum Zynq's junction temperature measured during the test
|75
|100.8
|3010
|4.1
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|-
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===Configuration #3=======Testbed====
Measurements have been performed on the following platform:
* Bora SOM: DBRD4110Q2P-01
**this model is based on Zynq XQ7Z020-1Q (Tj: '''-40°C / +125°C''')
* carrier board: [[BoraEVB]]
* processor frequency: '''667 MHz'''
* FPGA frequency
**30 40 MHz (Tamb = +85°C)
**150 MHz (Tamb = +-40°C)
*U-Boot: <code>2013.04 (Aug 25 2014 - 23:52:57) [belk-2.1.0]</code>
Please note that, when Tamb has been set to +85°C, the Bora SOM has been coupled to a passive heat sink to prevent exceeding maximum Zynq's junction temperature.
At the application level, PS executes concurrently several tasks including:*two instances of [https://github.com/Explorer09/cpustress-sources/blob/master/cpuburn/cpuburn-1.4a/ARM/burnCortexA9.s <code>burnCortexA9</code>]
*periodic reading of I2C RTC (Maxim DS3232M)
*periodic reading of Zynq's ADCs
*periodic reading of voltage/current probe (Texas Instruments INA226) connected to the SOM's power rail
*one instance of [http://pyropus.ca/software/memtester/ <code>memtester</code> over ], exercising 50 MByte of SDRAM
*endless loop of writing/reading/verifying operations on microSD card
*periodic reading of I2C remote temperature sensor (TExas Texas Instruments TMP421)*endless loop of writing/reading/verifying operations on memory stick connected to the USB port
*endless loop of writing/reading/verifying operations on NAND flash memory.
===Results===
|}
[1] In spite of the use of heat sink, this value exceeds maximum valued declared by the manufacturer. This is acceptable in case of stress tests, where it is possible that the parts of the DUT get damaged. <section end=Body/>
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