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Power (Bora/BoraLite)

191 bytes added, 15:41, 19 May 2023
Power Supply Unit (PSU) and recommended power-up sequence
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== Power Supply Unit (PSU) and recommended power-up sequence ==
Implementing correct power-up sequence for Zynq-based system is not a trivial task because several power rails are involved. Bora/BORA Lite SOM simplifies this task and embeds all the needed circuitry. The following picture shows a simplified block diagram of power supply subsystem.
Bora's PSU is designed to be robust against misbehaving power rails. However, the recommended power-on ramp for core and I/O supplies ranges from 1 to 6 V/ms.
'''N.B.''': Regarding power off, it is recommended taht that I/O supply is turned off before core supply.  (1) For BORA SOM this step is not mandatory and CB_PWR_GOOD can be left floating. CB_PWR_GOOD is provided to prevent, if necessary, BORA's PSU to turn on during ramp of carrier board 3.3VIN rail. Depending on carrier board's PSU design, this may lead to undesired glitches during ramp-up.
(1) This step is not mandatory and For BORA Lite SOM, the CB_PWR_GOOD can has to be left floating. CB_PWR_GOOD is provided connected to prevent, if necessary, Bora's PSU to turn on during ramp of the proper carrier board circuitry or with a pull-up to 3.3VIN rail. Depending on carrier board's PSU design, this may lead to undesired glitches during ramp-up.(if the power domain is monotone)
=== XCN15034 and power-off sequence ===
For more details about this matter, please refer to AR #65240<ref name="AR65240">http://www.xilinx.com/support/answers/65240.html</ref> and XCN15034<ref name="XCN15034">http://www.xilinx.com/support/documentation/customer_notices/xcn15034.pdf</ref>.
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