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Power (AxelLite)

618 bytes added, 10:23, 11 February 2015
Note on BOARD_PGOOD usage
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== Power Supply Unit (PSU) and recommended power-up sequence [5.1]==
Implementing correct power-up sequence for i.MX6 processors is not a trivial task because several power rails are involved. Axel Lite SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:
# PMIC transitions from OFF to ON state
# PMIC initiates power-up sequence needed by MX6 processor
# BOARD_PGOOD signal is raised; this active-high signal indicates that carrier board circuitry interfacing Axel Lite SoM's I/O has is powered. This signal can be used to be powered manage carrier board power up sequence in order to prevent back powering (from SoM to carrier board or vice versa). For additional information, please refer to the [[Power_(AxelLite)#Note_on_BOARD_PGOOD_usage | Note]] below.
# CPU_PORn is released.
 
==== Note on BOARD_PGOOD usage ====
 
BOARD_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals. Depending on the kind of such loads, BOARD_PGOOD might not be able to drive them properly. In these cases a simple 2-input AND port can be used to address this issue. The following picture depicts a principle schematic showing this solution. VDD_SOM denotes the power rail used to power AXEL LITE SoM.
 
[[File:Axel-lite-power-good.png]]
=== Power rails and related signals ===
* 3.3VIN: this is external main power rail. Voltage range is 3.3V±5%
* PMIC_CELL: PMIC's coin cell supply input/output
* BOARD_PGOOD: this output signal is used to indicate when carrier board's circuitry interfacing Axel Lite's I/Os has to be powered up.
For further details, please refer to the PMIC documentation: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MMPF0100%7CPF0100

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