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Pinout (BoraLite)

2 bytes removed, 13:48, 15 October 2019
J1 even pins (2 to 204)
|J1.18||SYS_RSTN||CPU.PS_SRST_B_501<br>MTR.~RST||B10<br>5||||||||
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|J1.20||MRSTN||MTR.MR||6||||||||Optionally internally connected to PORSTn (CPU.PS_POR_B_500)||
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|J2.22||VBAT_BKP||RTC.VBAT||6||||||||
|J1.88||IO_L3N_T0_DQS_34||FPGA.IO_L3N_T0_DQS_34||V13||||||||
|-
|J1.90||IO_L3P_T0_DQS_PUDC_B_34||FPGA.IO_L3P_T0_DQS_PUDC_B_34||U13|||||||| Internally connected to 3V3 via 10K resistor ||
|-
|J1.92||IO_L5N_T0_34||FPGA.IO_L5N_T0_34||T15||||||||
|J1.128||IO_L22N_T3_34||FPGA.IO_L22N_T3_34||W19||||||||
|-
|J1.130||IO_L12P_T1_MRCC_34||FPGA.IO_L12P_T1_MRCC_34||U18||||||||Optionally internally connected to RTC_INT/SQW||
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|J1.132||IO_L12N_T1_MRCC_34||FPGA.IO_L12N_T1_MRCC_34||U19||||||||
|J1.138||IO_L13N_T1_MRCC_34||FPGA.IO_L13N_T1_MRCC_34||P19||||||||
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|J1.140||IO_L13P_T2_MRCC_34||FPGA.IO_L13P_T1_MRCC_34||N18||||||||Optionally internally connected to RTC_32KHZ||
|-
|J1.142||IO_L14P_T2_SRCC_34||FPGA.IO_L14P_T2_SRCC_34||N20||||||||
8,154
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