3,260
edits
Changes
m
→J1 even pins (2 to 140)
|J1.134||NAND_IO7||CPU.PS_MIO12_500<br>NAND.I/O7||D9<br>44||||||||
|-
|J1.136||NAND_RD_B/VCFG1||CPU.PS_MIO8_500<br>NAND.~RE||D5<br>8||||||||This signal is pulled up or down by 20kOhm resistor to select proper bootstrap configuration.
|-
|J1.138||NAND_CLE/VCFG0||CPU.PS_MIO7_500<br>NAND.CLE||D8<br>16||||||||This signal is pulled up or down by 20kOhm resistor to select proper bootstrap configuration.
|-
|J1.140||DGND||DGND||n.a.||||||||
