3,260
edits
Changes
m
→J2 odd pins (1 to 139)
|J2.13||DGND||DGND||n.a.||||||||
|-
|J2.15||IO_L3P_T0_DQS_PUDC_B_34||FPGA.IO_L3P_T0_DQS_PUDC_B_34||U13||||||Internally connected to 3V3 via 10K resistor ||
|-
|J2.17||IO_L3N_T0_DQS_34||FPGA.IO_L3N_T0_DQS_34||V13||||||||
