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→SOM J2 ODD pins (1 to 139) declaration
{{Applies To Bora}}
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==Connectors and Pinout Table==
This chapter contains the pinout description of the Bora module, grouped in six tables (two – odd and even pins – for each connector) that report the pin mapping of the three 140-pin Bora connectors.
|J2.95||RTC_RST||RTC.~RST ||4||||I/O||3.3V||It can be left open if not used. For further details, please refer to the Maxim Integrated DS3232 datasheet.
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|J2.97||XADC_VN_R||FPGA.VN_0||L10||||I||VREFP|See [[BELK-TN-012: Using XADC signal module|BELK-TN-012 Using XADC signal module]]
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|J2.99||XADC_VP_R||FPGA.VP_0||K9||||I||VREFP|See [[BELK-TN-012: Using XADC signal module|BELK-TN-012 Using XADC signal module]]
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|J2.101||N.C.||Not Connected||-||||||||
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