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PL initialization signals (Bora/BoraX/BoraLite)

56 bytes added, 15:34, 14 December 2020
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= Introduction =
This page provides the information about the PL initialization signals: PROGRAM_B, INIT_B, and DONE.
= PL Logic =
* PROGRAM_B has an internal 10kΩ pull-up to VCCO_0 as indicated on Xilinx [https://www.xilinx.com/support/answers/56272.html AR#56272]
* INIT_B has no pull-up/down
* DONE has no pull-up/down. It does not require and any external pull-up or pull-down but can be used for connecting a user led for a configuration completed indication (see for example [https://mirror.dave.eu/bora/hw/BoraXEVB/S-EVBBX0000C0R-1.6.1_color.pdf#page=4 BoraXEVB schematics]).
= External pull-ups =
* PROGRAM_B: for a stronger pull-up, as indicated in the UG-585, place an external pull-up to a 3.3V controlled power domain in order to put it in parallel with the internal 10kΩ pull-up.
* INIT_B: for using this signal as ''PL initializing signal Low-to-High transition'', place an external pull-up to a 3.3V controlled power domain.
"3.3V controlled power domain" means that this rail has to be designed in order to meet the power sequences described [[Power (Bora/BoraLite)|here]]. For Usually, this purpose, is achieved by using a cheap power switch that is enabled by the BOARD_PGOOD signal can be used as illustrated in the following example:
== 3V3 on Carrier board ==
'''Attention'''[[File: the 3V3 Carrier BORA_BOARD_PGOOD_3V3.png|center|thumb|3.3V power domain, has to be driven and rail controlled via the BOARD_PGOOD signal as indicated on [[Power_(Bora/BoraLite)| Power page]]
A controlled switch can be placed in the Carrier board following the schematics example here below:
[[File:BORA_BOARD_PGOOD_3V3.png|center|thumb|3V3 controlled via BOARD_PGOOD]] Please, take into account that a similar internal switch (from 3V3_VIN is used on the SOM to generate the VCCO_0 voltage on the SOM. The input of that switch is connected to 3V3 the 3.3V rail used by to power the SOM's itself. This switch is configured in order to have a 654us delay. Thus, the external switch shown in the picture does not have to enable before the internal circuit) has a 654 us switch . In other words, its delayhas not to be less than 654us.
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