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= Introduction =
This page provides the information about the PL initialization signals: PROGRAM_B, INIT_B, and DONE
= PL Logic =
As written in UG-585 ''the Table 6-24: PL Initialization Signals'', the user can initialize the PL using the signals.
BORA, BORAX , and BORALite SOM are configured in the following way:
* PROGRAM_B has an internal 10Kohm 10kΩ pull-up to VCCO_0 as indicated on Xilinx [https://www.xilinx.com/support/answers/56272.html AR#56272]* INIT_B is directly connected to SOM connectorhas no pull-up/down* DONE has no pull-up/down. It does not require and external pull-up or pull-down but can be used for connecting a user led for a configuration completed indication (see for example [https://mirror.dave.eu/bora/hw/BoraXEVB/S-EVBBX0000C0R-1.6.1_color.pdf#page=4 BoraXEVB schematics]).
= External pull-ups =
* PROGRAM_B: for as a stronger pull-up, as indicated in the UG-585, place an external pull-up to a 3V3 3.3V controlled power domainin order to put it in parallel with the internal 10kΩ pull-up.* INIT_B: for using this signal as ''PL initializing signal Low-to-High transition'', place an external pull-up to a 3V3 3.3V controlled power domain."3.3V controlled power domain" means that this rail has to designed in order to meet the power sequences described [[Power (Bora/BoraLite)|here]]. For this purpose, the BOARD_PGOOD signal can be used as illustrated in the following example:
== 3V3 on Carrier board ==
