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== PL initialization signals ==This page provides information about the Programmable Logic =(PL) initialization signals: PROGRAM_B, INIT_B, and DONE.
Please refer to [https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf#page=218 Zynq Technical Reference Manual UG-585] for more information about usage and configuration of initialization circuit and signals.
As written described in UG-585 ''the Table 6-24: PL Initialization Signals'' of ''Zynq-7000 SoC Technical Reference Manual (UG585)'', the user can initialize the PL using the these signals.
BORA, BORAX , and BORALite SOM are configured in the following way:* PROGRAM_B has an internal 10kΩ pull-up to VCCO_0 as indicated on Xilinx [https://www.xilinx.com/support/answers/56272.html AR#56272]* INIT_B has no pull-up/down* DONE has no pull-up/down. It does not require any external pull-up or pull-down but can be used for connecting a user led for a configuration completed indication (see for example [https://mirror.dave.eu/bora/hw/BoraXEVB/S-EVBBX0000C0R-1.6.1_color.pdf#page=4 BoraXEVB schematics]).
=== External pull-ups ===* PROGRAM_B has an internal 10Kohm : UG-585 indicates to use a 4.7kΩ pull-up as indicated on resistor for this signal. This value was not known when the Xilinx [https://www.xilinx.com/support/answers/56272Zynq 7000 family was released.html AR#56272]* INIT_B is directly connected Nevertheless, to SOM connector* DONE does not require and external date, no issues have been reported although this pull-up or is a little bit weaker. In any case, an external pull-down but up to a 3.3V controlled power domain can be used for connecting put in parallel with the internal 10kΩ resistor to get a user led for a configuration completed indication (see for example stronger pull-up. For more details, please contact [httpsmailto://mirror.helpdesk@dave.eu/bora/hw/BoraXEVB/Sthe technical support].* INIT_B: for using this signal as ''PL initializing signal Low-EVBBX0000C0Rto-1High transition'', place an external pull-up to a 3.63V controlled power domain.1_color.pdf#page=4 BoraXEVB schematics])
<section end= External pull-ups =* PROGRAM_B: for as stronger pull-up, as indicated in the UG-585, place an external pull-up to a 3V3 controlled power domain* INIT_B: for using this signal as ''PL initializing signal Low-to-High transition'', place an external pull-up to a 3V3 controlled power domain == 3V3 on Carrier board == '''Attention''': the 3V3 Carrier power domain, has to be driven and controlled via BOARD_PGOOD signal as indicated on [[Power_(Bora/BoraLite)| Power page]] A controlled switch can be placed in the Carrier board following the schematics example here below: [[File:BORA_BOARD_PGOOD_3V3.png|center|thumb|3V3 controlled via BOARD_PGOOD]]>