Difference between revisions of "On board JTAG connector (AxelLite)"

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(Undo revision 9016 by U0007 (talk))
(Tag: Undo)
(→‎J7 - Connector's pinout)
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|2 || JTAG_TCK || - || -
 
|2 || JTAG_TCK || - || -
 
|-
 
|-
−
|3 || JTAG_TMS || - || -
+
|3 || JTAG_TMS || - || 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
 
|-
 
|-
−
|4 || JTAG_TDO || - || -
+
|4 || JTAG_TDO || - || 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
 
|-
 
|-
−
|5 || JTAG_TDI || - || -
+
|5 || JTAG_TDI || - || 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
 
|-
 
|-
−
|6 || JTAG_nTRST || - || -
+
|6 || JTAG_nTRST || - || 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
 
|-
 
|-
 
|7 || CPU_PORn || - || -
 
|7 || CPU_PORn || - || -
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|9 || N.C. || - || -
 
|9 || N.C. || - || -
 
|-
 
|-
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|10 || JTAG_VREF || - || -
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|10 || JTAG_VREF || - || 3V3 (BOARD_PGOOD driven signal)
 
|-
 
|-
 
|}
 
|}

Revision as of 15:56, 17 June 2020

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Info Box
Axel-lite 02.png Applies to Axel Lite

Introduction[edit | edit source]

JTAG signals are routed to a dedicated connector (J7) on the Axel Lite PCB. The connector is placed on the top side of the PCB, at the upper-right corner (please see the picture below).

Axellite-jtag-conn.png

J7 - Connector's pinout[edit | edit source]

J7 footprint mates with Samtec FSI-110-03-G-S connector. The following table reports the connector's pinout:

Pin# Pin name Function Notes
1 DGND - -
2 JTAG_TCK - -
3 JTAG_TMS - 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
4 JTAG_TDO - 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
5 JTAG_TDI - 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
6 JTAG_nTRST - 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
7 CPU_PORn - -
8 N.C. - -
9 N.C. - -
10 JTAG_VREF - 3V3 (BOARD_PGOOD driven signal)
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