Difference between revisions of "ORCA SOM/ORCA Evaluation Kit/Interfaces and Connectors/PCIe"

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!colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History
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<section begin="Body" />
  
 
==PCIe interface ==
 
==PCIe interface ==
  
''TBD: sostituire le sezioni con le informazioni sull'uso della periferica e del suo connettore''
+
=== Description  ===
''Nell'esempio di seguito c'è la descrizione dell'interfaccia UART/console''
+
 
 +
The PCI Express interface can be available on the Evaluation Kit at the connector J36. This connector is not mounted by default.
  
=== Description  ===
+
J36 is a USB3.0 Type-A connector that delivers 1x PCIe slot. An external adapter is needed to route the signals to a standard PCIe connector.
  
The PCIe interface available on the Evaluation Kit at the connector ''TBD:Jxxx''.  
+
The external adapter can be found as a ''PCIe riser'', commonly used in Ethereum mining.
  
''Jxx'' is a ''TBD:connector-type'' header connector for the RS232 two-wires UART3 port, used for debug purposes (bootloader and operating system serial console).
+
'''WARNING:''' do not connect USB devices to this port.
  
  
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{| class="wikitable"  
 
{| class="wikitable"  
! latexfontsize="scriptsize"| Pin#
+
! latexfontsize="scriptsize" | Pin#
! latexfontsize="scriptsize"| SOM Pin#
+
! latexfontsize="scriptsize" | SOM Pin#
! latexfontsize="scriptsize"| Pin name
+
! latexfontsize="scriptsize" | Pin name
! latexfontsize="scriptsize"| Pin function
+
! latexfontsize="scriptsize" | Pin function
! latexfontsize="scriptsize"| Pin Notes
+
! latexfontsize="scriptsize" | Pin Notes
 
|-
 
|-
|1,2,4,6,,7,8,10
+
|1
 
| -
 
| -
| N.A.
+
|VBUS
| N.C.
+
| PCIE_WAKE#
| Not connected
+
| Routed to a test point
 
|-
 
|-
| 3
+
| 2
| J1.189
+
|J15.157
| RS232_RX
+
|D-
| Receive line
+
| PCIE2_REF_CN_CLKN
 
|  
 
|  
 
|-
 
|-
 
| 3
 
| 3
| J1.187
+
|J15.155
| RS232_TX
+
|D+
| Transmit line
+
| PCIE2_REF_CN_CLKP
 
|  
 
|  
 
|-
 
|-
| 9
+
|4
 +
| -
 +
|GND
 +
| PCIE_PERST#
 +
| Routed to a test point
 +
|-
 +
|5
 +
|J15.159
 +
|SSRX-
 +
|PCIE_TXN_P
 +
|Internally decoupled with 100nF series
 +
|-
 +
|6
 +
|J15.161
 +
|SSRX+
 +
|PCIE_TXN_N
 +
|Internally decoupled with 100nF series
 +
|-
 +
|7
 
| -
 
| -
| DGND
+
|GND_D
| Ground
+
|Ground
|  
+
|
 +
|-
 +
|8
 +
|J15.163
 +
|SSTX-
 +
|PCIE_RXN_P
 +
|
 +
|-
 +
|9
 +
|J15.165
 +
|SSTX+
 +
|PCIE_RXN_N
 +
|
 
|}
 
|}
  
 
=== Device mapping ===
 
=== Device mapping ===
UART3 is mapped to <code>/dev/ttymxc2</code> device in Linux. The peripheral is used as the default serial console, both for the bootloader and the kernel.
+
The PCI express peripheral is mapped to the corresponding device in Linux depending on the associated kernel device driver and on the device tree configuration.
 
 
=== Device usage ===
 
 
 
To connect to the debug serial port:
 
 
 
# connect the DB9 adapter bracket to the J22 connector on the SBCX board
 
# connect a serial cable between DB9 connector and PC COM port through a NULL-modem cable (not provided)
 
# start your favorite terminal emulator software on PC (eg: PuTTY); communication parameters are: 115200,N,8,1
 
  
 
----
 
----
  
 
[[Category:ORCA SOM]]
 
[[Category:ORCA SOM]]

Revision as of 09:28, 16 September 2021

History
Version Issue Date Notes
1.0.0 Sep 2021 First release


PCIe interface[edit | edit source]

Description[edit | edit source]

The PCI Express interface can be available on the Evaluation Kit at the connector J36. This connector is not mounted by default.

J36 is a USB3.0 Type-A connector that delivers 1x PCIe slot. An external adapter is needed to route the signals to a standard PCIe connector.

The external adapter can be found as a PCIe riser, commonly used in Ethereum mining.

WARNING: do not connect USB devices to this port.


[[File:{Template:Nome-som-EVB-PCIe-connector.png|thumb|center|500px|PCIe connector]]

Signals[edit | edit source]

The following table describes the interface signals:

Pin# SOM Pin# Pin name Pin function Pin Notes
1 - VBUS PCIE_WAKE# Routed to a test point
2 J15.157 D- PCIE2_REF_CN_CLKN
3 J15.155 D+ PCIE2_REF_CN_CLKP
4 - GND PCIE_PERST# Routed to a test point
5 J15.159 SSRX- PCIE_TXN_P Internally decoupled with 100nF series
6 J15.161 SSRX+ PCIE_TXN_N Internally decoupled with 100nF series
7 - GND_D Ground
8 J15.163 SSTX- PCIE_RXN_P
9 J15.165 SSTX+ PCIE_RXN_N

Device mapping[edit | edit source]

The PCI express peripheral is mapped to the corresponding device in Linux depending on the associated kernel device driver and on the device tree configuration.