Difference between revisions of "ML-TN-006 — Keyword Spotting and Asymmetric Multiprocessing on Orca SBC"
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=Introduction= | =Introduction= | ||
| − | This Technical Note (TN) describes a demo application used to show the combination of an inference algorithm | + | This Technical Note (TN) describes a demo application used to show the combination of an inference algorithm, namely keyword spotting, and an asymmetric multiprocessing scheme (AMP). This use case can serve as the basis for more complex applications that have to carry out the following tasks: |
* Acquiring data from sensors in real-time | * Acquiring data from sensors in real-time | ||
| − | * | + | * Executing a computationally expensive inference algorithm on the collected data. |
| − | This scenario is quite common in the realm of AI at the edge and generally it can not be addressed with a microcontroller-based solution. On the other hand, a classic embedded processor running a complex operating | + | This scenario is quite common in the realm of AI at the edge and generally it can not be addressed with a microcontroller-based solution. On the other hand, a classic embedded processor running a complex operating system such as Linux might not be suited either because unable to handle tight real-time constrained tasks. |
In such cases, the power and the flexibility of the NXP i.MX8M Plus can be of much help, as this SoC features a heterogeneous architecture — an ARM Cortex-A53 complex and an ARM Cortex-M7 core — and a Neural Processing Unit (NPU). | In such cases, the power and the flexibility of the NXP i.MX8M Plus can be of much help, as this SoC features a heterogeneous architecture — an ARM Cortex-A53 complex and an ARM Cortex-M7 core — and a Neural Processing Unit (NPU). | ||
| − | The idea is to exploit | + | The idea is to exploit this heterogeneous architecture to implement an AMP configuration where |
| − | * The Cortex-A53 complex running Yocto Linux is devoted to execute the inference algorithm | + | * The Cortex-A53 complex — running Yocto Linux — is devoted to execute the inference algorithm with the hardware acceleration provided by the NPU |
| − | * The Cortex-M7 takes care of data acquisition | + | * The Cortex-M7 core takes care of data acquisition. |
=Testbed= | =Testbed= | ||
| + | The testbed is illustrated in the following picture. Basically, it consists of an Orca SBC | ||
=Implementation= | =Implementation= | ||
=Testing= | =Testing= | ||
Revision as of 17:47, 6 December 2021
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History[edit | edit source]
| Version | Date | Notes |
|---|---|---|
| 1.0.0 | December 2021 | First public release |
Introduction[edit | edit source]
This Technical Note (TN) describes a demo application used to show the combination of an inference algorithm, namely keyword spotting, and an asymmetric multiprocessing scheme (AMP). This use case can serve as the basis for more complex applications that have to carry out the following tasks:
- Acquiring data from sensors in real-time
- Executing a computationally expensive inference algorithm on the collected data.
This scenario is quite common in the realm of AI at the edge and generally it can not be addressed with a microcontroller-based solution. On the other hand, a classic embedded processor running a complex operating system such as Linux might not be suited either because unable to handle tight real-time constrained tasks.
In such cases, the power and the flexibility of the NXP i.MX8M Plus can be of much help, as this SoC features a heterogeneous architecture — an ARM Cortex-A53 complex and an ARM Cortex-M7 core — and a Neural Processing Unit (NPU).
The idea is to exploit this heterogeneous architecture to implement an AMP configuration where
- The Cortex-A53 complex — running Yocto Linux — is devoted to execute the inference algorithm with the hardware acceleration provided by the NPU
- The Cortex-M7 core takes care of data acquisition.
Testbed[edit | edit source]
The testbed is illustrated in the following picture. Basically, it consists of an Orca SBC
