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| rowspan="34" |'''Target'''
|Hardware platform
|ZCU104
|Petalinux
|2020.1
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|-
|Software binary image (microSD card)
|xilinx-zcu104-dpu-v2020.1-v1.2.0
|v2020.1-v1.2.0
|
|-
|For more details, please refer to the following sections.
|}
The target was configured in order to leverage the hardware acceleration provided by the [https://www.xilinx.com/products/intellectual-property/dpu.html Xilinx Deep Learning Processor Unit (DPU)], which is an IP instantiated in the Programmable Logic (PL) as depicted in the following block diagram.
