a000298_approval, dave_user
299
edits
Changes
→Handling CPU-initiated software reset
For these reasons we use a different approach that, in combination with the use of a processor's watchdog timer (WDT), provides a full hardware reset in case a software reset is issued.
This technique is implemented in [[DESK-MX8|DESK-MX8-L]]. At software level, U-Boot and Linux kernel software reset routines make use of processor's WDT to assert the WDOG_B signal. This signal in turn is routed to GPIO1_IO02 pad. At hardware level, this signal is AC-coupled to the master reset pin of the SOM voltage monitor. It's act a complete harware reset (on same way of EXT_RESET) by powering down the VDD_SOC_0V9 regulator.
----
[[Category:MITO 8M]]