a000298_approval, dave_user
299
edits
Changes
→Pinout Table EVEN pins declaration
|G
|
| colspan="2" |
|-
| rowspan="4" |J1.58
|G
|
| colspan="2" |
|-
|J1.84
|D
|
| colspan="2" |
|-
|J1.86
|D
|
| colspan="2" |
|-
|J1.88
|D
|
| colspan="2" |
|-
|J1.90
|D
|
| colspan="2" |
|-
|J1.92
|D
|
| colspan="2" |
|-
|J1.94
|D
|
| colspan="2" |
|-
|J1.96
|D
|
| colspan="2" |
|-
|J1.98
|D
|
| colspan="2" |
|-
|J1.100
|G
|
| colspan="2" |
|-
|J1.102
|D
|
| colspan="2" |
|-
|J1.104
|D
|
| colspan="2" |
|-
|J1.106
|D
|
| colspan="2" |
|-
|J1.108
|D
|
| colspan="2" |
|-
|J1.110
|D
|
| colspan="2" |
|-
|J1.112
|D
|
| colspan="2" |
|-
|J1.114
|D
|
| colspan="2" |
|-
|J1.116
|D
|
| colspan="2" |
|-
|J1.118
|D
|
| colspan="2" |
|-
|J1.120
|D
|
| colspan="2" |
|-
|J1.122
|G
|
| colspan="2" ||-|J1.124(NAND on board)|NAND_DQS|CPU.NAND_DQS|M20|NVCC_3V3|I/O|Internally used for NAND, do not connect||
|-
| rowspan="3" |J1.124
(eMMC on board)
| rowspan="3" |NAND_DQS
| rowspan="3" |CPU.NAND_DQS
| rowspan="3" |NVCC_3V3
| rowspan="3" |I/O
| rowspan="3" |Internally used for NAND, do not connect(available on eMMC storage SOM version)
|ALT0
|RAWNAND_DQS
|GPIO3_IO00
|-
| rowspan="53" |J1.128(eMMC)| rowspan="53" |NAND_CE0_B // SD1_CLK| rowspan="3" |CPU.NAND_CE0_B (eMMC storage SOM version)
| rowspan="3" |H19
| rowspan="3" |NVCC_3V3
|GPIO3_IO01
|-
| rowspan="2" |CPUJ1.SD1_CLK 128(NAND storage SOM version)| rowspan="2" |NAND_CE0_B // SD1_CLK| rowspan="2" |CPU.SD1_CLK
| rowspan="2" |L25
| rowspan="2" |NVCC_3V3