a000298_approval, dave_user
299
edits
Changes
→Pinout Table EVEN pins declaration
| rowspan="2" |CPU.SD1_STROBE
| rowspan="2" |T24
| rowspan="2" |NVCC_1V8NVCC_3V3 when available(NVCC_3V3 NVCC_1V8 on request)
| rowspan="2" |I/O
| rowspan="2" |internally Internally used for eMMC, do not connect(available on NAND storage SOMversion) ???
|ALT0
|USDHC1_STROBE
| rowspan="3" |NVCC_3V3
| rowspan="3" |I/O
| rowspan="3" |internally Internally used for NAND, do not connect(available on eMMC storage SOM version)
|ALT0
|RAWNAND_DQS
| rowspan="3" |NVCC_3V3
| rowspan="3" |I/O
| rowspan="3" |internally Internally used for NAND, do not connect(available on eMMC storage SOM version)
|ALT0
|RAWNAND_ALE
|GPIO3_IO00
|-
| rowspan="5" |J1.128| rowspan="5" |NAND_CE0_B // SD1_CLK| rowspan="3" |CPU.NAND_CE0_B // CPU.SD1_CLK(eMMC storage SOM version)| rowspan="3" |H19 // L25|rowspan="5" |NVCC_3V3 (NVCC_1V8 // NVCC_3V3 ???on request)| rowspan="5" |I/O|???rowspan="5" ||ALT0|RAWNAND_CE0_B|-|ALT1|QSPI_A_SS0_B|-|ALT5|GPIO3_IO01|-| rowspan="2" |CPU.SD1_CLK (NAND storage SOM version)| rowspan="2" |L25|ALT0|USDHC1_CLK
|-
|ALT5||||||||GPIO2_IO00
|-
|J1.130