a000298_approval, dave_user
299
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Changes
→Pinout Table J4 pins declaration
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| rowspan="4" |J4.15| rowspan="4" |SAI1_TXFS| rowspan="4" |CPU.SAI1_TXFS| rowspan="4" |H4| rowspan="4" |NVCC_3V3| rowspan="4" |I/O| rowspan="4" ||ALT0|SAI1_TX_SYNC|-|ALT1|SAI5_TX_SYNC|-|ALT4|CORESIGHT_EVENTO|-|ALT5|GPIO4_IO10|-| rowspan="4" |J4.16| rowspan="4" |SAI1_TXC| rowspan="4" |CPU.SAI1_TXC| rowspan="4" |J5| rowspan="4" |NVCC_3V3| rowspan="4" |I/O| rowspan="4" ||ALT0|SAI1_TX_BCLK|-|ALT1|SAI5_TX_BCLK|-|ALT4|CORESIGHT_EVENTI|-|ALT5|GPIO4_IO11|-| rowspan="5" |J4.17| rowspan="5" |SAI1_TXD0| rowspan="5" |CPU.SAI1_TXD0| rowspan="5" |F2| rowspan="5" |NVCC_3V3| rowspan="5" |I/O|rowspan="5" |internally used for BOOT config|ALT0|SAI1_TX_DATA0|-|ALT1|SAI5_TX_DATA0|-|ALT4|CORESIGHT_TRACE8|-|ALT5|GPIO4_IO12|-|ALT6|SRC_BOOT_CFG8|-| rowspan="5" |J4.18| rowspan="5" |SAI1_TXD1| rowspan="5" |CPU.SAI1_TXD1| rowspan="5" |E2| rowspan="5" |NVCC_3V3| rowspan="5" |I/O| rowspan="5" |internally used for BOOT config|ALT0|SAI1_TX_DATA1|-|ALT1|SAI5_TX_DATA1|-|ALT4|CORESIGHT_TRACE9|-|ALT5|GPIO4_IO13|-|ALT6|SRC_BOOT_CFG9|-| rowspan="5" |J4.19| rowspan="5" |SAI1_TXD2| rowspan="5" |CPU.SAI1_TXD2| rowspan="5" |B2| rowspan="5" |NVCC_3V3| rowspan="5" |I/O| rowspan="5" |internally used for BOOT config|ALT0|SAI1_TX_DATA2|-|ALT1|SAI5_TX_DATA2|-|ALT4|CORESIGHT_TRACE10|-|ALT5|GPIO4_IO14|-|ALT6|SRC_BOOT_CFG10|-| rowspan="5" |J4.20| rowspan="5" |SAI1_TXD3| rowspan="5" |CPU.SAI1_TXD3| rowspan="5" |D1| rowspan="5" |NVCC_3V3| rowspan="5" |I/O| rowspan="5" |internally used for BOOT config|ALT0|SAI1_TX_DATA3|-|ALT1|SAI5_TX_DATA3|-|ALT4|CORESIGHT_TRACE11|-|ALT5|GPIO4_IO15|-|ALT6|SRC_BOOT_CFG11|-| rowspan="6" |J4.21| rowspan="6" |SAI1_TXD4| rowspan="6" |CPU.SAI1_TXD4| rowspan="6" |D2| rowspan="6" |NVCC_3V3| rowspan="6" |I/O| rowspan="6" |internally used for BOOT config|ALT0|SAI1_TX_DATA4|-|ALT1|SAI6_RX_BCLK|-|ALT2|SAI6_TX_BCLK|-|ALT4|CORESIGHT_TRACE12|-|ALT5|GPIO4_IO16|-|ALT6|SRC_BOOT_CFG12|-| rowspan="6" |J4.22| rowspan="6" |SAI1_TXD5| rowspan="6" |CPU.SAI1_TXD5| rowspan="6" |C2| rowspan="6" |NVCC_3V3| rowspan="6" |I/O| rowspan="6" |internally used for BOOT config|ALT0|SAI1_TX_DATA5|-|ALT1|SAI6_RX_DATA0|-|ALT2|SAI6_TX_DATA0|-|ALT4|CORESIGHT_TRACE13|-|ALT5|GPIO4_IO17|-|ALT6|SRC_BOOT_CFG13|-| rowspan="6" |J4.23| rowspan="6" |SAI1_TXD6| rowspan="6" |CPU.SAI1_TXD6| rowspan="6" |B3| rowspan="6" |NVCC_3V3| rowspan="6" |I/O| rowspan="6" |internally used for BOOT config|ALT0|SAI1_TX_DATA6|-|ALT1|SAI6_RX_SYNC
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|J4.16|SAI1_TXC|CPU.SAI1_TXC|J5|NVCC_3V3|I/O||ALT2|SAI6_TX_SYNC
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|J4.17|SAI1_TXD0|CPU.SAI1_TXD0|F2|NVCC_3V3|I/O|internally used for BOOT config|ALT4|CORESIGHT_TRACE14
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|J4.18|SAI1_TXD1|CPU.SAI1_TXD1|E2|NVCC_3V3|I/O|internally used for BOOT config|ALT5|GPIO4_IO18
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|J4.19|SAI1_TXD2|CPU.SAI1_TXD2|B2|NVCC_3V3|I/O|internally used for BOOT config|ALT6|SRC_BOOT_CFG14
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| rowspan="5" |J4.2024|SAI1_TXD3rowspan="5" |SAI1_TXD7| rowspan="5" |CPU.SAI1_TXD3SAI1_TXD7|D1rowspan="5" |C1| rowspan="5" |NVCC_3V3| rowspan="5" |I/O| rowspan="5" |internally used for BOOT config|ALT0|SAI1_TX_DATA7
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|J4.21|SAI1_TXD4|CPU.SAI1_TXD4|D2|NVCC_3V3|I/O|internally used for BOOT config|ALT1|SAI6_MCLK
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|J4.22|SAI1_TXD5|CPU.SAI1_TXD5|C2|NVCC_3V3|I/O|internally used for BOOT config|ALT4|CORESIGHT_TRACE15
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|J4.23|SAI1_TXD6|CPU.SAI1_TXD6|B3|NVCC_3V3|I/O|internally used for BOOT config|ALT5|GPIO4_IO19
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|J4.24|SAI1_TXD7|CPU.SAI1_TXD7|C1|NVCC_3V3|I/O|internally used for BOOT config|ALT6|SRC_BOOT_CFG15
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|J4.25
|G
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===Pinout Table J5 pins declaration ===
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| rowspan="4" |J5.24| rowspan="4" |I2C4_SCL| rowspan="4" |CPU.I2C4_SCL| rowspan="4" |F8| rowspan="4" |NVCC_3V3| rowspan="4" |I/O|ALT0
|I2C4_SCL
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|ALT1|PWM2_OUT|-|ALT2|PCIE1_CLKREQ_B|-|ALT5|GPIO5_IO20|-| rowspan="4" |J5.25| rowspan="4" |I2C4_SDA| rowspan="4" |CPU.I2C4_SDA| rowspan="4" |F9| rowspan="4" |NVCC_3V3| rowspan="4" |I/O|ALT0
|I2C4_SDA
|CPU.I2C4_SDA-|F9ALT1|NVCC_3V3PWM1_OUT|I/O-|ALT2|PCIE2_CLKREQ_B|-|ALT5|GPIO5_IO21
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