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MITO 8M SOM/MITO 8M Hardware/Pinout Table

3,612 bytes added, 14:31, 24 September 2020
→‎Pinout Table ODD pins declaration
| rowspan="4" |NVCC_3V3
| rowspan="4" |I/O
| rowspan="4" |
|ALT0
|GPIO1_IO00
|-
|
|ALT1
|CCM_ENET_PHY_REF_CLK_ROOT
|-
|
|ALT5
|ANAMIX_REF_CLK_32K
|-
|
|ALT6
|CCM_EXT_CLK1
| rowspan="4" |NVCC_3V3
| rowspan="4" |I/O
| rowspan="4" |
|ALT0
|GPIO1_IO01
|-
|
|ALT1
|PWM1_OUT
|-
|
|ALT5
|ANAMIX_REF_CLK_25M
|-
|
|ALT6
|CCM_EXT_CLK2
| rowspan="3" |E6
| rowspan="3" |NVCC_3V3
| rowspan="3" |I/O| rowspan="3" |
|ALT0
|SPDIF1_EXT_CLK
|-
|
|
|ALT1
|PWM1_OUT
|-
|
|
|ALT5
|GPIO5_IO05
| rowspan="3" |NVCC_3V3
| rowspan="3" |I/O
| rowspan="3" |
|ALT0
|GPIO1_IO13
|-
|
|ALT1
|USB1_OTG_OC
|-
|
|ALT5
|PWM2_OUT
| rowspan="3" |NVCC_3V3
| rowspan="3" |I/O
| rowspan="3" |
|ALT0
|ECSPI2_SCLK
|-
|
|ALT1
|UART4_RX
|-
|
|ALT5
|GPIO5_IO10
| rowspan="3" |NVCC_3V3
| rowspan="3" |I/O
| rowspan="3" |
|ALT0
|ECSPI2_MOSI
|-
|
|ALT1
|UART4_TX
|-
|
|ALT5
|GPIO5_IO11
| rowspan="3" |NVCC_3V3
| rowspan="3" |I/O
| rowspan="3" |
|ALT0
|GPIO1_IO08
|-
|
|ALT1
|ENET1_1588_EVENT0_IN
|-
|
|ALT5
|USDHC2_RESET_B
| rowspan="3" |NVCC_3V3
| rowspan="3" |I/O
| rowspan="3" |
|ALT0
|GPIO1_IO09
|-
|
|ALT1
|ENET1_1588_EVENT0_OUT
|-
|
|ALT5
|SDMA2_EXT_EVENT0
| rowspan="3" |NVCC_3V3
| rowspan="3" |I/O
| rowspan="3" |
|ALT0
|ECSPI2_MISO
|-
|
|ALT1
|UART4_CTS_B
|-
|
|ALT5
|GPIO5_IO12
| rowspan="3" |NVCC_3V3
| rowspan="3" |I/O
| rowspan="3" |
|ALT0
|ECSPI2_SS0
|-
|
|ALT1
|UART4_RTS_B
|-
|
|ALT5
|GPIO5_IO13
| rowspan="3" |NVCC_3V3
| rowspan="3" |I/O
| rowspan="3" |
|ALT0
|GPIO1_IO05
|-
|
|ALT1
|M4_NMI
|-
|
|ALT5
|CCM_PMIC_READY
| rowspan="3" |NVCC_3V3
| rowspan="3" |I/O
| rowspan="3" |
|ALT0
|I2C2_SCL
|-
|
|ALT1
|ENET1_1588_EVENT1_IN
|-
|
|ALT5
|GPIO5_IO16
| rowspan="3" |NVCC_3V3
| rowspan="3" |I/O
| rowspan="3" |
|ALT0
|I2C2_SDA
|-
|
|ALT1
|ENET1_1588_EVENT1_OUT
|-
|
|ALT5
|GPIO5_IO17
| rowspan="4" |NVCC_3V3
| rowspan="4" |I/O
| rowspan="4" |
|ALT0
|GPIO1_IO06
|-
|
|ALT1
|ENET1_MDC
|-
|
|ALT5
|USDHC1_CD_B
|-
|
|ALT6
|CCM_EXT_CLK3
|-
| rowspan="3" |J1.69| rowspan="3" |SAI2_RXC| rowspan="3" |CPU.SAI2_RXC| rowspan="3" |H3| rowspan="3" |NVCC_3V3| rowspan="3" |I/O| rowspan="3" ||ALT0|SAI2_RX_BCLK|-|ALT1|SAI5_TX_BCLK|-|ALT5|GPIO4_IO22|-| rowspan="3" |J1.71| rowspan="3" |SAI2_RXFS| rowspan="3" |CPU.SAI2_RXFS| rowspan="3" |J4| rowspan="3" |NVCC_3V3| rowspan="3" |I/O|rowspan="3" ||ALT0|SAI2_RX_SYNC|-|ALT1|SAI5_TX_SYNC
|-
|J1.71|SAI2_RXFS|CPU.SAI2_RXFS|J4|NVCC_3V3|I/O||ALT5|GPIO4_IO21
|-
|J1.73
|
|-
| rowspan="2" |J1.75| rowspan="2" |SD2_DATA0| rowspan="2" |CPU.SD2_DATA0| rowspan="2" |N22| rowspan="2" |NVCC_3V3| rowspan="2" |I/O| rowspan="2" ||ALT0|USDHC2_DATA0|-|ALT5|GPIO2_IO15|-| rowspan="2" |J1.77| rowspan="2" |SD2_DATA1| rowspan="2" |CPU.SD2_DATA1| rowspan="2" |N21| rowspan="2" |NVCC_3V3| rowspan="2" |I/O| rowspan="2" ||ALT0|USDHC2_DATA1|-|ALT5|GPIO2_IO16|-| rowspan="2" |J1.79| rowspan="2" |SD2_DATA2| rowspan="2" |CPU.SD2_DATA2| rowspan="2" |P22| rowspan="2" |NVCC_3V3| rowspan="2" |I/O| rowspan="2" ||ALT0|USDHC2_DATA2|-|ALT5|GPIO2_IO17|-| rowspan="2" |J1.81| rowspan="2" |SD2_DATA3| rowspan="2" |CPU.SD2_DATA03| rowspan="2" |P21| rowspan="2" |NVCC_3V3| rowspan="2" |I/O| rowspan="2" ||ALT0|USDHC2_DATA3
|-
|J1.77|SD2_DATA1|CPU.SD2_DATA1|N21|NVCC_3V3|I/O||ALT5|GPIO2_IO18
|-
| rowspan="2" |J1.7983|SD2_DATA2rowspan="2" |SD2_CMD| rowspan="2" |CPU.SD2_DATA2SD2_CMD|P22rowspan="2" |M22| rowspan="2" |NVCC_3V3| rowspan="2" |I/O| rowspan="2" ||ALT0|USDHC2_CMD
|-
|J1.81|SD2_DATA3|CPU.SD2_DATA03|P21|NVCC_3V3|I/O||ALT5|GPIO2_IO14
|-
| rowspan="2" |J1.8385|SD2_CMDrowspan="2" |SD2_CLK| rowspan="2" |CPU.SD2_CMDSD2_CLK|M22rowspan="2" |L22| rowspan="2" |NVCC_3V3| rowspan="2" |I/O| rowspan="2" ||ALT0|USDHC2_CLK
|-
|J1.85|SD2_CLK|CPU.SD2_CLK|L22|NVCC_3V3|I/O||ALT5|GPIO2_IO13
|-
|J1.87
|
|-
| rowspan="3" |J1.89| rowspan="3" |UART3_TXD| rowspan="3" |CPU.UART3_TXD| rowspan="3" |B7| rowspan="3" |NVCC_3V3| rowspan="3" |I/O| rowspan="3" ||ALT0|UART3_TX|-|ALT1|UART1_RTS_B|-|ALT5|GPIO5_IO27|-| rowspan="3" |J1.91| rowspan="3" |UART3_RXD| rowspan="3" |CPU.UART3_RXD| rowspan="3" |A6| rowspan="3" |NVCC_3V3| rowspan="3" |I/O| rowspan="3" ||ALT0|UART3_RX|-|ALT1|UART1_CTS_B|-|ALT5|GPIO5_IO26|-| rowspan="4" |J1.93| rowspan="4" |UART4_TXD| rowspan="4" |CPU.UART4_TXD| rowspan="4" |D7| rowspan="4" |NVCC_3V3| rowspan="4" |I/O|rowspan="4" ||ALT0|UART4_TX|-|ALT1|UART2_RTS_B|-|ALT2|PCIE2_CLKREQ_B|-|ALT5|GPIO5_IO29|-| rowspan="4" |J1.95| rowspan="4" |UART4_RXD| rowspan="4" |CPU.UART4_RXD| rowspan="4" |C6| rowspan="4" |NVCC_3V3| rowspan="4" |I/O| rowspan="4" ||ALT0|UART4_RX|-|ALT1|UART2_CTS_B|-|ALT2|PCIE1_CLKREQ_B
|-
|J1.91|UART3_RXD|CPU.UART3_RXD|A6|NVCC_3V3|I/O||ALT5|GPIO5_IO28
|-
| rowspan="2" |J1.9397|UART4_TXDrowspan="2" |SD2_WP| rowspan="2" |CPU.UART4_TXDSD2_WP|D7rowspan="2" |M21| rowspan="2" |NVCC_3V3| rowspan="2" |I/O| rowspan="2" ||ALT0|USDHC2_WP
|-
|J1.95|UART4_RXD|CPU.UART4_RXD|C6|NVCC_3V3|I/O||ALT5|GPIO2_IO20
|-
| rowspan="2" |J1.9799|SD2_WProwspan="2" |SD2_RST_B| rowspan="2" |CPU.SD2_WPSD2_RESET_B|M21rowspan="2" |R22| rowspan="2" |NVCC_3V3| rowspan="2" |I/O| rowspan="2" ||ALT0|USDHC2_RESET_B
|-
|J1.99|SD2_RST_B|CPU.SD2_RESET_B|R22|NVCC_3V3|I/O||ALT5|GPIO2_IO19
|-
|J1.101
|
|-
| rowspan="2" |J1.177| rowspan="2" |SD2_CD_B| rowspan="2" |CPU.SD2_CD_B| rowspan="2" |L21| rowspan="2" |NVCC_3V3| rowspan="2" |I/O|rowspan="2" ||ALT0|USDHC2_CD_B|-|ALT5|GPIO2_IO12
|-
| rowspan="3" |J1.179| rowspan="3" |ECSPI1_SS0| rowspan="3" |CPU.ECSPI1_SS0| rowspan="3" |D4| rowspan="3" |NVCC_3V3| rowspan="3" |I/O| rowspan="3" ||ALT0
|ECSPI1_SS0
|CPU.ECSPI1_SS0
|D4
|NVCC_3V3
|I/O
|
|
|
|-
|ALT1|UART3_RTS_B|-|ALT5|GPIO5_IO09|-| rowspan="3" |J1.181| rowspan="3" |ECSPI1_SCLK| rowspan="3" |CPU.ECSPI1_SCLK| rowspan="3" |D5| rowspan="3" |NVCC_3V3| rowspan="3" |I/O| rowspan="3" ||ALT0
|ECSPI1_SCLK
|CPU.ECSPI1_SCLK
|D5
|NVCC_3V3
|I/O
|
|
|
|-
|ALT1|UART3_RX|-|ALT5|GPIO5_IO06|-| rowspan="3" |J1.183| rowspan="3" |ECSPI1_MISO| rowspan="3" |CPU.ECSPI1_MISO| rowspan="3" |B4| rowspan="3" |NVCC_3V3| rowspan="3" |I/O| rowspan="3" ||ALT0
|ECSPI1_MISO
|CPU.ECSPI1_MISO
|B4
|NVCC_3V3
|I/O
|
|
|
|-
|ALT1|UART3_CTS_B|-|ALT5|GPIO5_IO08|-| rowspan="3" |J1.185| rowspan="3" |GPIO1_IO03| rowspan="3" |CPU.GPIO1_IO03| rowspan="3" |P4| rowspan="3" |NVCC_3V3| rowspan="3" |I/O| rowspan="3" ||ALT0
|GPIO1_IO03
|CPU.GPIO1_IO03-|P4ALT1|NVCC_3V3|I/OUSDHC1_VSELECT|-|ALT5|SDMA1_EXT_EVENT0
|-
|J1.187
|
|-
| rowspan="3" |J1.195| rowspan="3" |ECSPI1_MOSI| rowspan="3" |CPU.ECSPI1_MOSI| rowspan="3" |A4| rowspan="3" |NVCC_3V3| rowspan="3" |I/O| rowspan="3" ||ALT0
|ECSPI1_MOSI
|CPU.ECSPI1_MOSI
|A4
|NVCC_3V3
|I/O
|
|
|
|-
|ALT1|UART3_TX|-|ALT5|GPIO5_IO07|-| rowspan="4" |J1.197| rowspan="4" |GPIO1_IO14| rowspan="4" |CPU.GPIO1_IO14| rowspan="4" |K7| rowspan="4" |NVCC_3V3| rowspan="4" |I/O| rowspan="4" ||ALT0
|GPIO1_IO14
|CPU.GPIO1_IO14
|K7
|NVCC_3V3
|I/O
|
|
|
|-
|ALT1|USB2_OTG_PWR|-|ALT5|PWM3_OUT|-|ALT6|CCM_CLKO1|-| rowspan="3" |J1.199| rowspan="3" |GPIO1_IO04| rowspan="3" |CPU.GPIO1_IO04| rowspan="3" |P5| rowspan="3" |NVCC_3V3| rowspan="3" |I/O| rowspan="3" ||ALT0
|GPIO1_IO04
|CPU.GPIO1_IO04
|P5
|NVCC_3V3
|I/O
|
|
|
|-
|ALT1|USDHC2_VSELECT|-|ALT5|SDMA1_EXT_EVENT1|-| rowspan="3" |J1.201| rowspan="3" |GPIO1_IO12| rowspan="3" |CPU.GPIO1_IO12| rowspan="3" |L7| rowspan="3" |NVCC_3V3| rowspan="3" |I/O| rowspan="3" ||ALT0
|GPIO1_IO12
|CPU.GPIO1_IO12-|L7ALT1|NVCC_3V3|I/OUSB1_OTG_PWR|-|ALT5|SDMA2_EXT_EVENT1
|-
|J1.203
U0005
a000298_approval, dave_user
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