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MITO 8M SOM/MITO 8M Hardware/Pinout Table

2,376 bytes added, 14:06, 24 September 2020
→‎Pinout Table ODD pins declaration
! latexfontsize="scriptsize" | Type
! latexfontsize="scriptsize" | Notes
! colspan="2" latexfontsize="scriptsize" | Alternative Functions
|-
|J1.1
|<nowiki>-</nowiki>
|G
|
|
|
|3.3VIN
|S
|
|
|
|3.3VIN
|S
|
|
|
|3.3VIN
|S
|
|
|
|3.3VIN
|S
|
|
|
| -
|G
|
|
|
|I/O
|must be level translated if used @ 3V3
|
|
|-
|I/O
|must be level translated if used @ 3V3
|
|
|-
| -
|G
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|G
|
|
|
|-
| rowspan="4" |J1.37| rowspan="4" |GPIO1_IO00| rowspan="4" |CPU.GPIO1_IO00| rowspan="4" |T6| rowspan="4" |NVCC_3V3| rowspan="4" |I/O||ALT0
|GPIO1_IO00
|CPU.GPIO1_IO00-|T6|NVCC_3V3ALT1|I/OCCM_ENET_PHY_REF_CLK_ROOT|-
|
|ALT5
|ANAMIX_REF_CLK_32K
|-
|
|ALT6
|CCM_EXT_CLK1
|-
| rowspan="4" |J1.39| rowspan="4" |GPIO1_IO01| rowspan="4" |CPU.GPIO1_IO01| rowspan="4" |T7| rowspan="4" |NVCC_3V3| rowspan="4" |I/O||ALT0
|GPIO1_IO01
|-||ALT1|PWM1_OUT|-||ALT5|ANAMIX_REF_CLK_25M|-||ALT6|CCM_EXT_CLK2|-| rowspan="3" |J1.41| rowspan="3" |SPDIF_EXT_CLK| rowspan="3" |CPU.GPIO1_IO01SPDIF_EXT_CLK|T7rowspan="3" |E6| rowspan="3" |NVCC_3V3
|I/O
|
|ALT0
|SPDIF1_EXT_CLK
|-
|
|
|ALT1
|PWM1_OUT
|-
|J1.41
|SPDIF_EXT_CLK
|CPU.SPDIF_EXT_CLK
|E6
|NVCC_3V3
|I/O
|
|
|ALT5
|GPIO5_IO05
|-
| rowspan="3" |J1.43| rowspan="3" |GPIO1_IO13| rowspan="3" |CPU.GPIO1_IO13| rowspan="3" |K6| rowspan="3" |NVCC_3V3| rowspan="3" |I/O||ALT0
|GPIO1_IO13
|CPU.GPIO1_IO13|K6|NVCC_3V3|I/O-
|
|ALT1
|USB1_OTG_OC
|-
|
|ALT5
|PWM2_OUT
|-
|J1.45
|VDD_PHY_1V8
|
|
|
|
|-
| rowspan="3" |J1.47| rowspan="3" |ECSPI2_SCLK| rowspan="3" |CPU.ECSPI2_SCLK| rowspan="3" |C5| rowspan="3" |NVCC_3V3| rowspan="3" |I/O||ALT0
|ECSPI2_SCLK
|CPU.ECSPI2_SCLK|C5|NVCC_3V3|I/O-
|
|ALT1
|UART4_RX
|-
|
|ALT5
|GPIO5_IO10
|-
| rowspan="3" |J1.49| rowspan="3" |ECSPI2_MOSI| rowspan="3" |CPU.ECSPI2_MOSI| rowspan="3" |E5| rowspan="3" |NVCC_3V3| rowspan="3" |I/O||ALT0
|ECSPI2_MOSI
|CPU.ECSPI2_MOSI|E5|NVCC_3V3|I/O-
|
|ALT1
|UART4_TX
|-
|
|ALT5
|GPIO5_IO11
|-
| rowspan="3" |J1.51| rowspan="3" |GPIO1_IO08| rowspan="3" |CPU.GPIO1_IO08| rowspan="3" |N7| rowspan="3" |NVCC_3V3| rowspan="3" |I/O||ALT0
|GPIO1_IO08
|CPU.GPIO1_IO08|N7|NVCC_3V3|I/O-
|
|ALT1
|ENET1_1588_EVENT0_IN
|-
|
|ALT5
|USDHC2_RESET_B
|-
| rowspan="3" |J1.53| rowspan="3" |GPIO1_IO09| rowspan="3" |CPU.GPIO1_IO09| rowspan="3" |M7| rowspan="3" |NVCC_3V3| rowspan="3" |I/O||ALT0
|GPIO1_IO09
|CPU.GPIO1_IO09|M7|NVCC_3V3|I/O-
|
|ALT1
|ENET1_1588_EVENT0_OUT
|-
|
|ALT5
|SDMA2_EXT_EVENT0
|-
| rowspan="3" |J1.55| rowspan="3" |ECSPI2_MISO| rowspan="3" |CPU.ECSPI2_MISO| rowspan="3" |B5| rowspan="3" |NVCC_3V3| rowspan="3" |I/O||ALT0
|ECSPI2_MISO
|CPU.ECSPI2_MISO|B5|NVCC_3V3|I/O-
|
|ALT1
|UART4_CTS_B
|-
|
|ALT5
|GPIO5_IO12
|-
|J1.57
|<nowiki>-</nowiki>
|G
|
|
|
|-
| rowspan="3" |J1.59| rowspan="3" |ECSPI2_SS0| rowspan="3" |CPU.ECSPI2_SS0| rowspan="3" |A5| rowspan="3" |NVCC_3V3| rowspan="3" |I/O||ALT0
|ECSPI2_SS0
|CPU.ECSPI2_SS0|A5|NVCC_3V3|I/O-
|
|ALT1
|UART4_RTS_B
|-
|
|ALT5
|GPIO5_IO13
|-
| rowspan="3" |J1.61| rowspan="3" |GPIO1_IO05| rowspan="3" |CPU.GPIO1_IO05| rowspan="3" |P7| rowspan="3" |NVCC_3V3| rowspan="3" |I/O||ALT0
|GPIO1_IO05
|CPU.GPIO1_IO05|P7|NVCC_3V3|I/O-
|
|ALT1
|M4_NMI
|-
|
|ALT5
|CCM_PMIC_READY
|-
| rowspan="3" |J1.63| rowspan="3" |I2C2_SCL| rowspan="3" |CPU.I2C2_SCL| rowspan="3" |G7| rowspan="3" |NVCC_3V3| rowspan="3" |I/O||ALT0
|I2C2_SCL
|CPU.I2C2_SCL|G7|NVCC_3V3|I/O-
|
|ALT1
|ENET1_1588_EVENT1_IN
|-
|
|ALT5
|GPIO5_IO16
|-
| rowspan="3" |J1.65| rowspan="3" |I2C2_SDA| rowspan="3" |CPU.I2C2_SDA| rowspan="3" |F7| rowspan="3" |NVCC_3V3| rowspan="3" |I/O||ALT0
|I2C2_SDA
|CPU.I2C2_SDA|F7|NVCC_3V3|I/O-
|
|ALT1
|ENET1_1588_EVENT1_OUT
|-
|
|ALT5
|GPIO5_IO17
|-
| rowspan="4" |J1.67| rowspan="4" |GPIO1_IO06| rowspan="4" |CPU.GPIO1_IO06| rowspan="4" |N5| rowspan="4" |NVCC_3V3| rowspan="4" |I/O||ALT0
|GPIO1_IO06
|CPU.GPIO1_IO06-|N5|NVCC_3V3ALT1|I/OENET1_MDC|-
|
|ALT5
|USDHC1_CD_B
|-
|
|ALT6
|CCM_EXT_CLK3
|-
|J1.69
|NVCC_3V3
|I/O
|
|
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|NVCC_3V3
|I/O
|
|
|
|<nowiki>-</nowiki>
|G
|
|
|
|NVCC_3V3
|I/O
|
|
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|NVCC_3V3
|I/O
|
|
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|NVCC_3V3
|I/O
|
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|NVCC_3V3
|I/O
|
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|NVCC_3V3
|I/O
|
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|NVCC_3V3
|I/O
|
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|
|<nowiki>-</nowiki>
|G
|
|
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|NVCC_3V3
|I/O
|
|
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|NVCC_3V3
|I/O
|
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|NVCC_3V3
|I/O
|
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|NVCC_3V3
|I/O
|
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|NVCC_3V3
|I/O
|
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|NVCC_3V3
|I/O
|
|
|
|VDD_PHY_1V8
|I/O
|
|
|
|VDD_PHY_1V8
|I/O
|
|
|
|D
|connected with capacitor in series
|
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|-
|D
|connected with capacitor in series
|
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|-
|<nowiki>-</nowiki>
|G
|
|
|
|D
|connected with capacitor in series
|
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|-
|D
|connected with capacitor in series
|
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|-
|D
|connected with capacitor in series
|
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|-
|D
|connected with capacitor in series
|
|
|-
|D
|connected with capacitor in series
|
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|-
|D
|connected with capacitor in series
|
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|-
|D
|connected with capacitor in series
|
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|-
|D
|connected with capacitor in series
|
|
|-
|VDD_PHY_1V8
|I/O
|
|
|
|VDD_PHY_1V8
|I/O
|
|
|
|<nowiki>-</nowiki>
|G
|
|
|
| -
|D
|
|
|
| -
|D
|
|
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| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
|<nowiki>-</nowiki>
|G
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
|
|
| -
|D
|
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| -
|D
|
|
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| -
|D
|
|
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| -
|D
|
|
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| -
|D
|
|
|
|<nowiki>-</nowiki>
|G
|
|
|
|NVCC_3V3
|I/O
|
|
|
|NVCC_3V3
|I/O
|
|
|
|NVCC_3V3
|I/O
|
|
|
|NVCC_3V3
|I/O
|
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|NVCC_3V3
|I/O
|
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|NVCC_3V3
|I/O
|
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|NVCC_3V3
|I/O
|
|
|
|NVCC_3V3
|I/O
|
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|NVCC_3V3
|I/O
|
|
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|NVCC_3V3
|I/O
|
|
|
|NVCC_3V3
|I/O
|
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|NVCC_3V3
|I/O
|
|
|
|NVCC_3V3
|I/O
|
|
|
|<nowiki>-</nowiki>
|G
|
|
|
U0005
a000298_approval, dave_user
299
edits
Retrieved from "https://wiki.dave.eu/index.php/Special:MobileDiff/10233"