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=== Connectors description ===
In the following table are described all available connectors integrated on MITO 8M Mini/Nano SOM:
{| class="wikitable"
|-
|GPIO5_IO29
|-
| rowspan="43" |J1.193| rowspan="43" |UART4_RXD| rowspan="43" |CPU.UART4_RXD| rowspan="43" |F19| rowspan="43" |NVCC_3V3| rowspan="43" |I/O| rowspan="43" |
|ALT0
|UART4_RX
|ALT1
|UART2_CTS_B
|-
|ALT5
|GPIO5_IO21
|-
| rowspan="43" |J1.76| rowspan="43" |I2C4_SCL| rowspan="43" |CPU.I2C4_SCL| rowspan="43" |D13| rowspan="43" |NVCC_3V3| rowspan="43" |I/O| rowspan="43" |
|ALT0
|I2C4_SCL
|ALT1
|PWM2_OUT
|-
|ALT5
|-
|J1.84
|PCIE1_REF_CLKN|CPU.PCIE_REF_CLK_N|A21|VDDA_1V8|D
|
|
|-
|J1.86
|PCIE1_REF_CLKP|CPU.PCIE_REF_CLK_P|B21|VDDA_1V8|D
|
|
|-
|J1.92
|PCIE1_RXN|CPU.PCIE_RXN_N|A19|VDDA_1V8|D
|
|
|-
|J1.94
|PCIE1_RXP|CPU.PCIE_RXN_P|B19|VDDA_1V8|D
|
|
|-
|J1.96
|PCIE1_TXN|CPU.PCIE_TXN_N|A20|VDDA_1V8|D
|
|
|-
|J1.98
|PCIE1_TXP|CPU.PCIE_TXN_P|B20|VDDA_1V8|D
|
|