Difference between revisions of "MITO 8M Nano SOM/MITO 8M Nano Hardware/General Information/Processor and memory subsystem"
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== Processor and memory subsystem == | == Processor and memory subsystem == | ||
| − | The heart of MITO 8M | + | The heart of MITO 8M Nano module is composed by the following components: |
| − | *i.MX8M | + | *i.MX8M Nano SoC application processor |
* Power supply unit | * Power supply unit | ||
* LPDDR4 memory bank | * LPDDR4 memory bank | ||
| Line 27: | Line 27: | ||
*** partially compatible with [[AXEL Lite SOM]] | *** partially compatible with [[AXEL Lite SOM]] | ||
| − | This chapter shortly describes the main MITO 8M | + | This chapter shortly describes the main MITO 8M Nano components. |
=== Processor Info === | === Processor Info === | ||
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---- | ---- | ||
| − | |||
[[Category:MITO 8M Nano]] | [[Category:MITO 8M Nano]] | ||
Revision as of 10:19, 24 February 2021
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Contents
Processor and memory subsystem[edit | edit source]
The heart of MITO 8M Nano module is composed by the following components:
- i.MX8M Nano SoC application processor
- Power supply unit
- LPDDR4 memory bank
- eMMC or NAND flash banks
- Connectors:
- 1 x 204 pins SO-DIMM edge connector with interfaces signals
- partially compatible with AXEL Lite SOM
- 1 x 204 pins SO-DIMM edge connector with interfaces signals
This chapter shortly describes the main MITO 8M Nano components.
Processor Info[edit | edit source]
| Processor | i.MX8M Nano Dual | i.MX8M Nano Quad |
| # Cores | 2x Arm® Cortex®-A53
1x Arm® Cortex®-M7 |
4x Arm® Cortex®-A53
1x Arm® Cortex®-M7 |
| Clock | 1.4 GHz 1.5 GHz | |
| L2
Cache |
1 MB | |
| LPDDR4 | 16 bit @ 1600 MHz
(LPDDR4-3200) | |
| GPU | Vivante GC 7000UL (2 Shader)
OpenGL ES 3.1 | |
| Display
Controller |
Dual Independent LVDS channel
Display Support up to 1080p60 | |
| Video
Output |
1x MIPI-DSI (with MIPI to LVDS bridge) | |
| Camera
Input |
1x MIPI CSI (4-lanes) | |
| USB | 2x USB 2.0 OTG | |
RAM memory bank[edit | edit source]
LPDD4 SDRAM memory bank is composed by 1x 32-bit width chip. The following table reports the SDRAM specifications:
| CPU connection | Multi-mode DDR controller (MMDC) |
| Size max | 4 GB |
| Width | 16 bit |
| Speed | 1600 MHz |
eMMC flash bank[edit | edit source]
On board main storage memory eMMC is connected to the SDIO1 interface and it can act as boot peripheral. The following table reports the eMMC flash specifications:
| CPU connection | SDIO1 |
| Size min | 4 GB |
| Size max | 64 GB |
| Bootable | Yes |
NAND flash bank[edit | edit source]
|
Section not completed yet |
Alternative option for main storage memory can be a 8-bit wide NAND flash connected to the CPU's Raw NAND flash controller. It can act as boot peripheral. The following table reports the NAND flash specifications:
| CPU connection | Raw NAND flash controller |
| Page size | TBD |
| Size min | TBD |
| Size max | TBD |
| Width | 8 bit |
| Chip select | TBD |
| Bootable | Yes |
Memory map[edit | edit source]
For detailed information, please refer to chapter 2 “Memory Maps” of the i.MX8M Nano Applications Processor Reference Manual
Power supply unit[edit | edit source]
MITO 8M Nano embeds all the elements required for powering the unit, therefore power sequencing is self-contained and simplified. Nevertheless, power must be provided from carrier board, and therefore users should be aware of the ranges power supply can assume as well as all other parameters.
