Difference between revisions of "MITO 8M Mini SOM/MITO 8M Mini Hardware/Peripherals/SPI"
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*Full-duplex synchronous serial interface | *Full-duplex synchronous serial interface | ||
*Master/Slave configurable | *Master/Slave configurable | ||
| − | * | + | *Four Chip Select (SS) signals to support multiple peripherals |
*Transfer continuation function allows unlimited length data transfers | *Transfer continuation function allows unlimited length data transfers | ||
*32-bit wide by 64-entry FIFO for both transmit and receive data | *32-bit wide by 64-entry FIFO for both transmit and receive data | ||
Revision as of 15:48, 28 January 2021
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| History | |||
|---|---|---|---|
| Version | Issue Date | Notes | |
| 1.0.0 | Dec 2020 | First release | |
Peripheral SPI[edit | edit source]
The Enhanced Configurable Serial Peripheral Interface (ECSPI) is a full-duplex, synchronous, four-wire serial communication block.
Description[edit | edit source]
Three SPI interface are available on MITO 8M Mini/Nano based on iMX8M Mini/Nano SoC.
The SPI port supports the following standards and features:
- Full-duplex synchronous serial interface
- Master/Slave configurable
- Four Chip Select (SS) signals to support multiple peripherals
- Transfer continuation function allows unlimited length data transfers
- 32-bit wide by 64-entry FIFO for both transmit and receive data
- Polarity and phase of the Chip Select (SS) and SPI Clock (SCLK) are configurable
- Direct Memory Access (DMA) support
Pin mapping[edit | edit source]
The Pin mapping is described in the Pinout table section
