Bureaucrats, dave_user, Administrators
4,650
edits
Changes
→Overview
When working as controller, it feeds slave devices (stage lighting dimmers, special effects machines, etc.) with DMX streams. DMX data can be generated programmatically on the fly or can be retrieved from previously recorded streams.
When working as recorder, the product "sniffs" and stores DMX data traffic traveling on the connected buses. Each DMX frame is stored onto a permanent storage device — an e.MMC or a microSD card, for instance — with an '''associated timestamp'''. Thus, the data stream streams can be played at a later time with the '''same timings of the original oneones'''.
As shown in the block diagram, the product features a rich set of I/O's ranging from the [https://en.wikipedia.org/wiki/DMX512 DMX/RDM] channels to network interfaces. With regard to the Graphical User Interface, two displays are supported: an HDMI monitor and a local LVDS display. It is worth remembering that they can work simultaneously, for example in mirror mode.
The core of the system is the [[ORCA SOM|Orca SoM]], which in turn is built around the [https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-plus-arm-cortex-a53-machine-learning-vision-multimedia-and-industrial-iot:IMX8MPLUS i.MX8M Plus] system-on-chip by NXP.
The A53-centred domain runs a Yocto Linux distribution. The product's main application is executed in this domain. In particular, this application integrates the business logic and implements the GUI. Also, it deals with all the peripherals and interfaces not having real-time constraints such as the temperature sensor, the gyroscope, the Ethernet ports, etc.
The Linux domain is widely scalable in terms of computational power as multiple versions of the SoC are available featuring a different number of A53 cores (1, 2, or 4). These versions are ballout compatible, thus one the same hardware board platform fits them all.
== Real-timeness ==
As stated previously, the ARM Cortex-M7 core and the FPGA are the building blocks of the DMX/RDM domain.
A real-time operating system (FreeRTOS) runs on the M7 core. The application executed on top of the RTOS communicates with the Linux domain through RPMsg-Lite, a ''lightweight implementation of the Remote Processor Messaging (RPMsg) protocol'' according to [https://github.com/NXPmicro/rpmsg-lite NXP documentation]. Basically, the M7 acts as a bridge between the Linux domain and the FPGA, which is responsible for transmitting and receiving physically the DMX/RDM frames on the buses. Obviously, the FPGA processing times are deterministic.
From a logical point of view, the whole transmitting/receiving chain looks like as shown in the following picture.
