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Basically, the product is a dual-role device: it can operate either as a controller or as a recorder.
When working as controller, it feeds slave devices such as (stage lighting dimmers and , special effects machines , etc.) with DMX streams. DMX data can be generated programmatically on the fly or can be retrieved from previously recorded streams.
When working as recorder, the product "sniffs" and stores DMX data traffictraveling on the connected buses. Each DMX frame is stored with an associated timestamp in order to . Thus, the data stream can be played at a later time with the same timings of the original one.
As shownin the block diagram, the product features a rich set of I/O's ranging from the [https://en.wikipedia.org/wiki/DMX512 DMX/RDM] channels to the network interfaces.
The core of the system is the [[ORCA SOM|Orca SoM]], which in turn is built around the [https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-plus-arm-cortex-a53-machine-learning-vision-multimedia-and-industrial-iot:IMX8MPLUS i.MX8M Plus] system-on-chip by NXP.
== Heterogeneous asymmetric multiprocessing ==
From the computational standpoint, there are two domains running two different operating systems. In this regard, the resulting architecture is an example of [https://en.wikipedia.org/wiki/Heterogeneous_computing heterogeneous] [https://en.wikipedia.org/wiki/Asymmetric_multiprocessing asymmetric multiprocessing] as it is based on different types of cores, namely the ARM Cortex-A53 and the ARM Cortex-M7.
The system architect chose this implementation because it is convenient to satisfy the diversified product's requirements. In particular, the DMX/RDM subsystem must meet real-time requirements in order to be compliant with the DMX/RDM standards. The DMX/RDM subsystem consists of the an ARM Cortex-M7 core working in tandem with an FPGA. On the M7 core, a real-time operating system (FreeRTOS) runs. The application executed on top of the RTOS communicates with the Linux domain through RPMsg-Lite, a ''lightweight implementation of the Remote Processor Messaging (RPMsg) protocol'' according to [https://github.com/NXPmicro/rpmsg-lite NXP documentation]. On the other side, the M7 core is connected to an FPGA through an I2S bus. Even though this bus is conceived for digital audio streams, it fits very well for conveying the data to/from the DMX/RDM channels. The A53-centred domain runs a Yocto Linux distribution. Here, the main application is executed. It integrates the product's business logic and implements the GUI. Also, it deals with all the peripherals and interfaces not having real-time constraints such as the temperature sensor, the gyroscope, the Ethernet ports, etc.
The A53-centred Linux domain runs a Yocto Linux distribution. Here is widely scalable in terms of computational power as the main application is executed dealing withSoC comes wit
scalability cores
