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As shown, the product features a rich set of I/O's ranging from the [https://en.wikipedia.org/wiki/DMX512 DMX/RDM] channels to the network interfaces.
The core of the systems system is the [[ORCA SOM|Orca SoM]], which in turn is built around the [https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-plus-arm-cortex-a53-machine-learning-vision-multimedia-and-industrial-iot:IMX8MPLUS i.MX8M Plus] system-on-chip by NXP.
== Heterogeneous asymmetric multiprocessing ==
The system architect chose this implementation because it is convenient to satisfy the diversified product's requirements. In particular, the DMX/RDM subsystem must meet real-time requirements in order to be compliant with the DMX/RDM standards. The DMX/RDM subsystem consists of the ARM Cortex-M7 core working in tandem with an FPGA. On the M7 core, a real-time operating system (FreeRTOS) runs. The application executed on top of the RTOS communicates with the Linux domain through RPMsg-Lite, a ''lightweight implementation of the Remote Processor Messaging (RPMsg) protocol'' according to [https://github.com/NXPmicro/rpmsg-lite NXP documentation]. On the other side, the M7 core is connected to an FPGA through an I2S bus. Even though this bus is conceived for digital audio streams, it fits very well for conveying the data to/from the DMX/RDM channels.
The A53-centred domain runs a Yocto Linux distribution. Here the main application is executed dealing with
