This Technical Note (TN for short) illustrates the concept behind a custom product developed by DAVE Embedded Systems for a customer operating in the professional lighting market. This project is a useful use case for showing some interesting technologies that can address effectively common requirements in the world of embedded systems for industrial applications.

Basically, the product is a dual-role device: it can operate either as a '''controller ''' or as a '''recorder'''.

When working as a controller, it feeds slave devices such as (stage lighting dimmers and , special effects machines , etc.) with DMX streams. DMX data can be generated programmatically on the fly or can be retrieved from previously recorded streams.

When working as a recorder, the product "sniffs" and stores DMX data traffictraveling on the connected buses. Each DMX frame is stored onto a permanent storage device — an e.MMC or a microSD card, for instance — with an '''associated timestamp in order to '''. Thus, the data streams can be played at a later time with the '''same timings of the original ones'''.

As shownin the block diagram, the product features a rich set of I/O's ranging from the [https://en.wikipedia.org/wiki/DMX512 DMX/RDM] channels to the network interfaces. With regard to the Graphical User Interface, two displays are supported: an HDMI monitor and a local LVDS display. It is worth remembering that they can work simultaneously, for example in mirror mode.

Functionally== Heterogeneous asymmetric multiprocessing ==From the computational standpoint, there are two domains running '''two different operating systems'''. In this regard, the resulting architecture is an example of [https://en.wikipedia.org/wiki/Heterogeneous_computing heterogeneous] [https://en.wikipedia.org/wiki/Asymmetric_multiprocessing asymmetric multiprocessing] as it is based on different types of cores, namely the ARM Cortex-A53 and the ARM Cortex-M7. The system architect chose this implementation because it is convenient to satisfy the diversified product's requirements. In particular, the DMX/RDM subsystem must meet '''real-time requirements''' in order to be compliant with the DMX/RDM standards. The DMX/RDM subsystem consists of an ARM Cortex-M7 core working in tandem with an FPGA. The M7 and the FPGA are connected with an I²S bus. Even though this bus is conceived for digital audio streams, it fits very well for conveying the data to/from the DMX/RDM channels.

The A53-centred domain runs a Yocto Linux distribution. The product's main application is executed in this domain. In particular, this application integrates the business logic and implements the GUI. Also, it deals with all the peripherals and interfaces not having real-time constraints such as the temperature sensor, the gyroscope, the Ethernet ports, etc. The Linux domain is widely scalable in terms of computational power as multiple versions of the SoC are available featuring a different number of A53 cores (1, 2, or 4). These versions are ballout compatible, thus '''the same hardware platform fits them all'''.  == Heterogeneous asymmetric multiprocessing Real-timeness ==From As stated previously, the ARM Cortex-M7 core and the computational standpoint, there FPGA are two domains running two different the building blocks of the DMX/RDM domain. A real-time operating systemssystem (FreeRTOS) runs on the M7 core. In this regardThe application executed on top of the RTOS communicates with the Linux domain through RPMsg-Lite, a ''lightweight implementation of the resulting architecture is an example of Remote Processor Messaging (RPMsg) protocol'' according to [https://en.wikipediagithub.orgcom/wikiNXPmicro/Heterogeneous_computing heterogeneousrpmsg-lite NXP documentation] [https://en.wikipedia.org/wiki/Asymmetric_multiprocessing asymmetric multiprocessing] Basically, the M7 acts as it a bridge between the Linux domain and the FPGA, which is based responsible for transmitting and receiving the DMX/RDM frames on different types of cores, namely the ARM Cortex-A53 and the ARM Cortex-M7buses at physical level.

The system architect chose this implementation because it is convenient to satisfy the diversified product's requirements. In particular, the DMX/RDM subsystem must meet real-time requirements in order to be compliant with the DMX/RDM standards. The DMX/RDM subsystem consists of the ARM Cortex-M7 core working in tandem with an FPGA. On the M7 core, a real-time operating system (FreeRTOS) runs. The application executed on top of the RTOS communicates with the Linux domain through RPMsg-Lite, From a ''lightweight implementation logical point of the Remote Processor Messaging (RPMsg) protocol'' according to [https://github.com/NXPmicro/rpmsg-lite NXP documentation]. On the other sideview, the M7 core is connected to an FPGA through an I2S bus. Even though this bus is conceived for digital audio streams, it fits very well for conveying the data towhole transmitting/from receiving chain looks like as shown in the DMX/RDM channelsfollowing picture.

The A53[[File:DMX-centred domain runs a Yocto Linux distributionRDM-stack. Here the main application is executed dealing withpng|center|thumb|450x450px]]