This Technical Note (TN for short) illustrates the concept behind a custom product developed by DAVE Embedded Systems for a customer operating in the professional lighting market. This project is a useful use case for showing some interesting technologies that can address effectively common requirements in the world of embedded systems for industrial applications.

As shown[[File:DMX-RDM-controller-bd.png|center|thumb|885x885px]] Basically, the product features is a rich set of I/Odual-role device: it can operate either as a '''controller''' or as a '''recorder'''s ranging .  When working as a controller, it feeds slave devices (stage lighting dimmers, special effects machines, etc.) with DMX streams. DMX data can be generated programmatically on the fly or can be retrieved from previously recorded streams.  When working as a recorder, the [https://enproduct "sniffs" and stores DMX data traffic traveling on the connected buses.wikipediaEach DMX frame is stored onto a permanent storage device — an e.org/wiki/DMX512 DMX/RDM] channels to MMC or a microSD card, for instance — with an '''associated timestamp'''. Thus, the data streams can be played at a later time with the '''same timings of the network interfacesoriginal ones'''.

The core of As shown in the systems is block diagram, the [[ORCA SOM|Orca SoM]], which in turn is built around product features a rich set of I/O's ranging from the [https://wwwen.nxpwikipedia.comorg/productswiki/processors-and-microcontrollersDMX512 DMX/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-plus-arm-cortex-a53-machine-learning-vision-multimedia-RDM] channels to network interfaces. With regard to the Graphical User Interface, two displays are supported: an HDMI monitor and-industrial-iot:IMX8MPLUS ia local LVDS display.MX8M Plus] system-on-chip by NXPIt is worth remembering that they can work simultaneously, for example in mirror mode.

From a functional standpointThe core of the system is the [[ORCA SOM|Orca SoM]], which in turn is built around the main [https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-plus-arm-cortex-a53-machine-learning-vision-multimedia-and-industrial-iot:IMX8MPLUS i.MX8M Plus] system-on-chip by NXP.

From the computational standpoint, there are two domains running '''two different operating systems'''. In this regard, the resulting architecture is an example of [https://en.wikipedia.org/wiki/Heterogeneous_computing heterogeneous] [https://en.wikipedia.org/wiki/Asymmetric_multiprocessing asymmetric multiprocessing] as it is based on different types of cores, namely the ARM Cortex-A53 and the ARM Cortex-M7. The system architect chose this implementation because it is convenient to satisfy the diversified product's requirements. In particular, the DMX/RDM subsystem must meet '''real-time requirements''' in order to be compliant with the DMX/RDM standards. The DMX/RDM subsystem consists of an ARM Cortex-M7 core working in tandem with an FPGA. The M7 and the FPGA are connected with an I²S bus. Even though this bus is conceived for digital audio streams, it fits very well for conveying the data to/from the DMX/RDM channels. The A53-centred domain runs a Yocto Linux distribution. The product's main application is executed in this domain. In particular, this application integrates the business logic and implements the GUI. Also, it deals with all the peripherals and interfaces not having real-time constraints such as the temperature sensor, the gyroscope, the Ethernet ports, etc. The Linux domain is widely scalable in terms of computational power as multiple versions of the SoC are available featuring a different number of A53 cores (1, 2, or 4). These versions are ballout compatible, thus '''the same hardware platform fits them all'''.  == Real-timeness ==As stated previously, the ARM Cortex-M7 core and the FPGA are the building blocks of the DMX/RDM domain. A real-time operating system (FreeRTOS) runs on the M7 core. The application executed on top of the RTOS communicates with the Linux domain through RPMsg-Lite, a ''lightweight implementation of the Remote Processor Messaging (RPMsg) protocol'' according to [https://github.com/NXPmicro/rpmsg-lite NXP documentation]. Basically, the M7 acts as a bridge between the Linux domain and the FPGA, which is responsible for transmitting and receiving the DMX/RDM frames on the buses at physical level. From a logical point of view, the whole transmitting/receiving chain looks like as shown in the following picture. [[File:DMX-RDM-stack.png|center|thumb|450x450px]]

== IoT and security ==The system architect chose this implementation because it product is convenient an example of edge computing platform as well. It connects to satisfy the diversified productcustomer's requirementscloud to upload data retrieved on the field and to manage OTA software updates. In particularorder to use secure connections, the DMX/RDM subsystem must meet real-time requirements in order to be compliant product is equipped with the DMX/RDM standardstwo secure elements: * NXP EdgeLock SE050 * Microchip ATECC608A. The DMX/RDM subsystem consists first one is part of the ARM Cortex-M7 core working in tandem with an FPGA. On the M7 core[[ORCA SOM|Orca SoM]], a real-time operating system (FreeRTOS) runs. The application executed on top of while the RTOS communicates with second is optionally populated at the Linux domain through RPMsg-Lite, a ''lightweight implementation of the Remote Processor Messaging (RPMsg) protocol'' according carrier board level. These components allow to implement several schemes to [https://github.com/NXPmicro/rpmsgaddress security-lite NXP documentation]related issues. On From the other sidesoftware perspective, they are supported by the M7 core is connected to an FPGA Linux BSP so that the user space applications can access them through an I2S bushigh-level API's. Even though this bus The Linux BSP is conceived for digital audio streams, it fits very well for conveying the data to/derived from the DMX/RDM channelsrelease L5.4.70 by NXP.