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Introduction
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==Introduction==
Mito8M is the first DAVE Embedded Systems' system-on-module (SoM) based on a core implementing the [https://en.wikipedia.org/wiki/ARM_architecture#64/32-bit_architecture ARMv8-A] architecture. Traditionally, ARM cores that are based on 32-bit [https://en.wikipedia.org/wiki/ARM_architecture#AArch32 ARMv7-A] architecture exhibit a limited RAM bandwidth even if they are coupled with 64-bit width SDRAM banks. As an example, please see [[SBCX-TN-006:_Characterizing_the_RAM_bandwidth_of_Axel_Lite_SoM#Testbed_general_configuration|this Technical Note]] where we characterized the SDRAM bandwidth of Cortex A9-based Axel Lite SoM. When dealing with computationally heavy tasks, this factor a limited RAM bandwidth efficiency may turn out to be a severe bottleneck bounding the overall performance.
Besides an intrinsic increased computational power over their predecessors, ARMv8-A-based SoC's are also expected to improve RAM bandwidth significantly. This technical note (TN for short) illustrates several benchmarking benchmark tests that were run on Mito8M SoM to characterize this its bandwidth. It is worth to remember that Mito8M is built upon the [https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i.mx-applications-processors/i.mx-8-processors/i.mx-8m-family-armcortex-a53-cortex-m4-audio-voice-video:i.MX8M i.MX8M processor by NXP].
==Testbed general configuration==
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