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→A real-word case: UART RX FIFO overrun
A lot of device drivers exist in the kernel space. Many of them need to temporarily disable interrupts to implement specific hardware-related operations. During the interrupt-disabled time windows, any peripheral could issue an interrupt request anyway. If this happens, associated interrupt service routine execution is delayed until (at least) interrupts are enabled again. As a consequence, when this particular condition happens, interrupt latency is greater than the average one. It is virtually impossible to estimate the upper bound because exploring all the possible execution paths at kernel level is not feasible. Generally speaking, maximum interrupt latency can be even orders of magnitude greater that the average one.
===A real-word case: UART RX FIFO overrun===
[[Power_management_(Axel)#Interrupt_latency |This case]] is a typical example that is pretty hard to analyze because a lot of variables are involved and therefore it is extremely difficult to isolate cause-effect relationships. In other words, with the help of software-based tools only, it is not easy to find out which are the drivers that cause the UART RX interrupt latency to explode. Advanced debugging tools providing tracing capabilities such as Lauterbach TRACE32/PowerDebug are extremely useful to perform such investigations. In this specific case, this tool allowed to find out that the SD controller driver affects interrupt latencies dramatically. This is due to 1ms delay that is implemented in the driver and that is issued after disabling the interrupts. In case the physical SD card interface is not provided with the card detect signal, this condition occurs on a regular basis because the polling mechanism used to detect the presence of the card. Thus it is relatively likely that RX FIFO interrupts is triggered in the middle of such delay, causing the overrun issue.
