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LCC USB SSD (DUL)

1,674 bytes added, 13:54, 25 February 2015
Pinout and detailed pin functions
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{{Applies To DUL}}
{{Applies To SSD_modules}}
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{{ImportantMessage|text=Please note that information here provided are preliminary and subject to change.}}
==Introduction==
DUL belongs to the [[:Category:SSD modules|Dave '''DAVE Embedded Systems''' Solid State Disk (SSD)]] product family. These devices implements SSD solutions that are conceived for use in embedded systems operating in harsh environments where no compromises are tolerated about reliability. On the other hand, they are designed in order to ease the use from the system integrator's standpoint, in terms of hardware issues and software compatibility. These characteristics make them suited for use in combination with a wide range of host devices, from low-cost microcontrollers to high-end embedded processors.
SSD product family is composed by several subfamilies. Two major factors distinguish subfamilies: mechanical outline and host interface. DUL comes in Leadless Chip Carrier (LCC) package. Host interface is USB. Non-volatile storage is based on NAND flash tecnologytechnology.
[[File:Dul-coin.png|thumbnail|center|]]
* From the mechanical standpoint, adoption of LCC outline guarantees a solid and firm mating with carrier board hosting DUL making this product particularly suited for environments where mechanical vibrations are an issue.
* About power supply, two inputs are provided along with status indicators:
** VIN: this is main power supply input. See [[#Pinoutand detailed pin functions|Pinout]] section for more information about voltage range.
** VIN_AUX (available on request): this input is provided to implement a second power supply unit on carrier board (for example based on supercap or battery) that prevents power cut in case main supply experiences a glitch or a power cut. This option is a powerful weapon to face unpredictable power loss and to guarantee data integrity.
** Power rail switch indicator.
** to recover from unexpected power-off
[[File:Dul-ruler.png|thumbnail|center|]]
 
==Specification==
* Package outline: Leadless Chip Carrier LCC-68 (JEDEC MS004); 9 actual leads per side are implemented
| 9||13||NC||||Reserved for future use||-||Please leave unconnected.
|-
| 10||22||STAT2#||Open-drain output||Status indicator for backup power supply. Pulls down when power is drawn from VIN_AUX rail.||||Can be left open or grounded when not used. When used, it must be pulled-hi.
|-
| 11||23||WARN#||Open-drain output||Overcurrent/thermal warning indicator. Pulls down when either main power supply or backup power supply current exceeds its current limit (4A) or die temperature of internal switch (130°C) is close to thermal shutdown.||||Can be left open or grounded when not used. When used, it must be pulled-hi.
|-
| 12||24||STAT1#||Open-drain output||Status indicator for main power supply. Pulls down when power is drawn from VIN_AUX VIN rail.||||Can be left open or grounded when not used. When used, it must be pulled-hi.
|-
| 13||25||NC||||Reserved for future use||-||Please leave unconnected.
* EXT_FWP#: this signal is connected directly to the WPn pin of NAND flash device. Two options are available:
** by default, it is output only and is used to inform carrier board logic about the write protection enabling determined by controller. This can be used, for example, to implement warning signalling for the user.
** on request it can be provided as bidirectional open-drain pin with internal 10kOhm pull-up to 3.3V. In this case, beside the output function described previously, it allows carrier board logic to inhibit NAND flash write operations directly. For example system integrator could imagine a scenario where a hardware watchdog - that monitors host processor connected to DUL - acts on this pin by disabling write operations in case processor hangs. This option is extremely powerful but '''it must be handled with care'''. In case carrier board logic pulls EXT_FWP# down, NAND controller is not able to detect this condition thus it continues to report to the host that the media is writable. This may lead to unpredictable behaviour, depending on several factors, including operating system - if any - running on host machine.
==Integration guide==
This section provides useful information and resources that allow the system designer to integrate DUL module in his/her application very quickly.
===Typical scenarios===
====Microcontroller-based application====
The following pictures shows conceptual block diagram of microcontroller-based application.
[[File:Dul-uc-scenario.png|thumb|center]]
Microcontroller integrates USB host controller with PHY that interfaces DUL D+/D- differential pair.
 
STAT1#, STAT2# and WARN# signals are monitored by microntroller software.
 
Microcontroller is also able to drive SET_WP# to enable read-only mode.
 
EXT_FWP# is connected to an optional watchdog timer than, when expires, inhibits any write operation on NAND flash, no matter what instructions microcontroller is executing.
 
LCC_RESET# signal is driven by an optional voltage monitor.
 
Last but not least, both primary (VIN) and secondary (VIN_AUX) power inputs are used:
* VIN is connected to main power supply (3.3V) that is used to power microcontroller too
* VIN_AUX is connected to an optional energy storage device as described in [[#Reliability|Reliability]] section.
====Embedded PC-based application====
The following pictures shows conceptual block diagram of application where the role of the host is played by an Embedded PC.
[[File:Dul-epc-scenario.png|thumb|center]]
In this case DUL D+/D- differential pair are connected to USB port of host. Please note that the 5V power rail of USB bus (VBUS according to USB nomenclature) is used to power DUL.
 
An optional LED is connected to LED_0 to provide user with status/activity signalling.
 
===Mechanical information===
[[File:Dul-mech.png|thumbnail|center|Mechanical dimensions]]
Step: http://www.dave.eu/download/restricted/ssd/dul/dul-3d.zip
===Backup power supply circuits===
Please refer to [[Backup power supply circuits (SSD modulesDUL)]]. 
==Qualification tests==
===* [[Data integrity===TBD===and I/O performance===TBDtests (DUL)]]