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===EMAC1===
→Introduction
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==Introduction==
This page provides useful information and resources to system designers in order to integrate Naon module in his/her application very quickly. These information complement SoM-independent recommendations provided in the [[Carrier_board_design_guidelines_(SOM) | Carrier board design guidelines (SOM)]] page.
Several topics are covered, ranging from hardware issues to manufacturing aspects.
==Hardware==
===Reference designs===Several schematcis schematics are available in order to accelerate the design of carrier board hosting Naon SOM. Please note that, even if these schematics are derived from tested real-world applications, they are provided "as is" and they might be modified in order to adapt to your specific application.===Naon connectors pinout===The following links provide a portion of schematic where Naon mating connectors are instatiated:* [http://www.dave.eu/download/restricted/naon/common/hw/naon-connectors.zip Orcad]* [http://www.dave.eu/download/restricted/naon/common/hw/naon-connectors.pdf PDF]
Following sections provides some additional information helping to understand schematics.
Available schematics:
* NaonEVB-Lite: [[NaonEVB-Lite#Schematics]]
* NaonEVB-Mid: [[NaonEVB-Mid#Schematics]]
====Naon mating connectors====
Compatible part numbers are FX8C-140P-SVx by Hirose. x depends on selected stacking height. For more details please see [http://www.hirose-connectors.com/connectors/H205SeriesGaiyou.aspx?c1=FX8C&c3=3 Hirose FX8C Series].
====Boot sequence====
Naon default boot sequence can be changed by optional external circuitry.
===Carrier board design guidelines===
[[Carrier board design guidelines (SOM)|This page]] provides general guidelines about how to implement carrier boards hosting SOM.
In the following sections further hardware guidelines valid for NAON are analyzed. The information provided here complete the [[Carrier board design guidelines (SOM)|Carrier board design guidelines]] for some specific interfaces.
===Boot sequence= Interfaces Guidelines ====For interfaces not mentioned in this section, refer to the generic guidelines.===== USB =========== PCB ======Table listeb below integrates the general basic guidelines table{| {{table border=1}}| align="center" style="background:#f0f0f0;"|'''Parameter for USB Differential Pairs'''| align="center" style="background:#f0f0f0;"|'''Min'''| align="center" style="background:#f0f0f0;"|'''Typ'''| align="center" style="background:#f0f0f0;"|'''Max'''|-| Max traces length ||-||-||14"|}===== SATA =========== PCB ======Table listeb below integrates the general basic guidelines table{| {{table border=1}}| align="center" style="background:#f0f0f0;"|'''Parameter for USB Differential Pairs'''| align="center" style="background:#f0f0f0;"|'''Min'''| align="center" style="background:#f0f0f0;"|'''Typ'''| align="center" style="background:#f0f0f0;"|'''Max'''|-| Intra pair matching(mils||-||-||10|-| Inter pair matching(mils||-||-||-|-| Max traces length ||-||-||6"|} === LCD Interface ======= PCB ====* Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils* Place series terminator near Naon default boot sequence can be changed by optional external circuitryConnector=== VIN Interface ======= PCB ====* Matching depends from Pixel Clock. The schematicsAs general rule, match lines at 500-800 mils* Place series terminator near VIN source=== RMII Interface ===This interface is a subset of the RGMII port.==== Schematic ====* use a standard RMII PHY device that support 50MHz Clock input mode* Set PHY address different from integrated PHY
==Software==
Software section of the integration guide is about software device support for Naon hardware peripherals on different OSes.
For additional information regarding lowlevel support and configuration take a look at [http://processors.wiki.ti.com/index.php/TI81xx_PSP_Porting_Guide PSP Porting guide on TI wiki]
=== Pin Mux Configuration ===
The first thing to do when adding/modifying a peripheral is configure correctly the internal Pin Mux:in fact, nearly every peripheral function can be attached to more than one pin and nearly every pin is shared between two or more peripheral.
Pin Mux is quite complex in [[:Category:Naon|Naon]] and, fortunately, a tool from TI can help: we suggest to download and install TI [http://processors.wiki.ti.com/index.php/Pin_Mux_Utility_for_ARM_MPU_Processors Pin Mux Utility] from [http://focus.ti.com/docs/toolsw/folders/print/pinmuxtool.html TI website]. Software installation and generic usage documentation is available on [http://processors.wiki.ti.com/index.php/Pin_Mux_Utility_for_ARM_MPU_Processors this TI wiki page]
==== Pin Mux Configuration in u-boot ====
Due the fact the correct configuration of pin mux usually should be applied as soon as possible and that's better if pin mux is done is only one place, '''DAVE Embedded Systems''' chose to move all its initialization inside the startup code of [[:Category:U-Boot|U-Boot]]
Changing default pin mux configuration is just a matter of:
# open TI Pin Mux configuration
# load the Naon default configuration provided by '''DAVE Embedded Systems'''
# change the mux as needed
# export the generated source code into the [[:Category:U-Boot|U-Boot]] source tree
# [[Development_Environment_HowTo_%28NELK%29#Build.2Fconfigure_U-Boot_only|rebuild u-boot]] and update it on your Naon board
For an in-depth description of the above steps see [[Pin Mux Configuration in U-Boot (Naon)]] article.
=== UART ===
==== Additional UART on Linux ====
See the article [[Additional UART on Linux (Naon)]] for a step-by-step guide.
==== Change default U-Boot Console ====
See the article [[Change Default U-Boot Console (Naon)]] for more details.
=== SPI ===
==== Additional SPI bus on Linux ====
==== Additional SPI peripheral on Linux ====
=== I2C ===
==== Additional I2C peripheral on Linux ====
=== GPIO ===
==== Using a pin as GPIO on Linux ====
==Miscellaneous==
