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Host setup and development flow (BELK/BXELK)

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Please note that <code>git fetch</code> doesn't merge the commits on the current branch. To do that, the developer should run the <code>git merge</code> command or replace the ''fetch-merge'' process with a single git pull command. Please note that the recommended method is the ''fetch-merge'' process. For further information on Git, please refer to the official Git Documentation (http://git-scm.com/documentation).
Please refer to [[Accessing_DAVE_Embedded_Systems_restricted_git_repositories|this page]] for detailed instructions on how to get access to DAVE Embedded Systems' git repositories.
===Working with BXELK===
The following sections describe how to perform the most common tasks for building the software components for a BORA-based embedded system.
====Creating and building a Zynq project for BoraX====
BXELK provides an example Vivado project for BoraX boards. This project allows to:
*generate the FSBL binary image
*generate the bitstream of a simple PL design used to route PS' CAN0 and UART0 signals through EMIO (see also the following pictures).
This article describes how two build this project. Two procedures are described, the former is command line based while the latter is GUI based.
The project is stored is a git repository, as described in section 3.3.2.1. It is assumed that the Zynq development environment has been set up properly (see section 3.3.2 for more details).
[[File:TBD.png|thumb|center|600px|caption]]
 
=====Command line based procedure=====
The procedure is the following:
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