Hardware Manual (Bora)
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Contents
- 1 Preface
- 2 Introduction
- 3 Design Overview
- 4 Mechanical specifications
- 5 Power, reset and control
- 6 Pinout table
- 7 Peripheral interfaces
- 8 Operational Characteristics
- 9 Application notes
Preface[edit | edit source]
About this manual[edit | edit source]
Copyright/Trademarks[edit | edit source]
Ethernet® is a registered trademark of XEROX Corporation.
All other products and trademarks mentioned in this manual are property of their respective owners.
All rights reserved. Specifications may change at any time without notice.
Standards[edit | edit source]
Dave SrL is certified to ISO 9001 standards.
Disclaimers[edit | edit source]
Warranty[edit | edit source]
Technical Support[edit | edit source]
Related Documents[edit | edit source]
Hardware Manual in PDF format[edit | edit source]
Please download the Bora Hardware Manual in pdf format
Conventions, Abbreviations, Acronyms[edit | edit source]
| Abbreviation | Definition |
| BTN | Button |
| GPI | General Purpose Input |
| GPIO | Generla Purpose Input and Output |
| GPO | General Purpose Output |
| BELK | Bora Embedded Linux Kit |
| PCB | Printed Circuit Board |
| RTC | Real Time Clock |
| SOM | System On Module |
| PMIC | Power Managemente Integrated Circuit |
Introduction[edit | edit source]
Product Highlights[edit | edit source]
Block Diagram[edit | edit source]
The following image shows Diva's block diagram:
Feature Summary[edit | edit source]
Design Overview[edit | edit source]
Processor Info[edit | edit source]
RAM memory bank[edit | edit source]
NOR flash bank[edit | edit source]
NAND flash bank[edit | edit source]
Memory map[edit | edit source]
Mechanical specifications[edit | edit source]
This chapter describes the mechanical characteristics of the Bora module.
Board Layout[edit | edit source]
The following figure shows the physical dimensions of the Bora module:
The following figure highlights the maximum components' heights on Bora module:
Connectors[edit | edit source]
The following figure shows the Diva connector layout:
Power, reset and control[edit | edit source]
Power Supply Unit (PSU) and recommended power-up sequence[edit | edit source]
The recommended power-up sequence is:
PMIC[edit | edit source]
Reset scheme and voltage monitoring[edit | edit source]
Some of these reset signals are accessible by carrier board circuitry as described below.
EXT_PORSTn[edit | edit source]
PORSTn_OUT[edit | edit source]
WARMRSTn[edit | edit source]
RTC_PWRONRSTn[edit | edit source]
JTAG_TRSTn[edit | edit source]
PMIC_nRESPWRON[edit | edit source]
MRSTn[edit | edit source]
Boot Options[edit | edit source]
Default boot configuration[edit | edit source]
Boot sequence customization[edit | edit source]
Clock scheme[edit | edit source]
Recovery[edit | edit source]
JTAG recovery[edit | edit source]
SD/MMC recovery[edit | edit source]
Multiplexing[edit | edit source]
RTC[edit | edit source]
Watchdog[edit | edit source]
Pinout table[edit | edit source]
This chapter contains the pinout description of the connectors of the Bora module.
Peripheral interfaces[edit | edit source]
Operational Characteristics[edit | edit source]
Maximum ratings[edit | edit source]
| Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|
| Main power supply voltage | V |
Recommended ratings[edit | edit source]
| Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|
| Main power supply voltage | V |
Power consumption[edit | edit source]
Heat dissipation[edit | edit source]
This section will be completed in a future version of this manual.
Application notes[edit | edit source]
Please refer to the following documents available on Dave Developers Wiki:
