Difference between revisions of "Hardware Manual (Bora)"

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m (Product Highlights)
m (Feature Summary)
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== Feature Summary ==
 
== Feature Summary ==
 +
{| class="wikitable" |
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| align="center" style="background:#f0f0f0;"|'''Feature'''
 +
| align="center" style="background:#f0f0f0;"|'''Specifications'''
 +
| align="center" style="background:#f0f0f0;"|'''Options'''
 +
|-
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| CPU||Xilinx Dual ARM Cortex-A9<br>ZYNQ XC7Z010/ZC7Z020 @ 800MHz ||
 +
|-
 +
| Cache||L1: 32Kbyte instruction, 32Kbyte data<br>L2: 512Kbyte for each core ||
 +
|-
 +
| RAM|| DDR3 SDRAM @ 533 MHz<br>Up to 1 GB||
 +
|-
 +
| Storage||Flash NOR SPI (8, 16, 32 MB)<br>Flash NAND (all sizes, on request)||
 +
|-
 +
|+ align="bottom" style="caption-side: bottom" | Table: CPU and Memories
 +
|}
 +
 +
 +
{| class="wikitable" |
 +
| align="center" style="background:#f0f0f0;"|'''Feature'''
 +
| align="center" style="background:#f0f0f0;"|'''Specifications'''
 +
| align="center" style="background:#f0f0f0;"|'''Options'''
 +
|-
 +
| Graphics Controller||Up to 24-Bits Data Output<br>Resolution Up to 2048x2048 (With Maximum 126-MHz Pixel Clock)<br>TFT/RGB support ||
 +
|-
 +
| 2D/3D Engine||NEON Multimedia SIMD coprocessor<br>PowerVR SGX 530 3D Accelerator ||
 +
|-
 +
| Coprocessors||Crypto Hardware Accelerator (AES, SHA, PKA, RNG)<br>Up to 2x Programmable Realtime Units (PRUs) ||
 +
|-
 +
| USB||Up to 2x 2.0 OTG ports||
 +
|-
 +
| UARTs||Up to 6x UART ports||
 +
|-
 +
| GPIO||Up to 118 lines, shared with other functions (interrupts available)||
 +
|-
 +
| Input interfaces||Integrated 4/5/8-wire resistive touch screen controller||
 +
|-
 +
| Networking||Fast Ethernet with PHY<br>Additional MII/RMII/RGMII interface||
 +
|-
 +
| CAN||Dual CAN controller (version 2 part A, B)||
 +
|-
 +
| SD/MMC||Up to 3x MMC/SD/SDIO Serial interfaces (up to 48 MHz)||
 +
|-
 +
| Serial busses||Up to 3x I²C channels<br>Up to 2x SPI channels||
 +
|-
 +
| Audio||Up to 2x McASP interface||
 +
|-
 +
| Timers||Up to N programmable general purpose timers (PWM function available)||
 +
|-
 +
| RTC and watchdog||On board, external battery powered<br>||
 +
|-
 +
| Debug||JTAG IEEE 1149.1 Test Access Port<br>ETM Port<br>ETB Port||
 +
|-
 +
| Miscellaneous||Up to 8x 12-bit ADC channels||
 +
|-
 +
|+ align="bottom" style="caption-side: bottom" | Table: Peripherals
 +
|}
 +
 +
 +
{| class="wikitable" |
 +
| align="center" style="background:#f0f0f0;"|'''Feature'''
 +
| align="center" style="background:#f0f0f0;"|'''Specifications'''
 +
| align="center" style="background:#f0f0f0;"|'''Options'''
 +
|-
 +
| Supply Voltage||[3.6 - 5.5] V, voltage regulation on board||
 +
|-
 +
| Active power consumption|| Please refer to [[Hardware_Manual_(Diva)#Power_consumption_2 | Power consumption]] section||
 +
|-
 +
| Dimensions||67.5 mm x  38.3 mm||
 +
|-
 +
| Weight|| ||
 +
|-
 +
| MTBF|| ||
 +
|-
 +
| Operating temperature||0..70 °C<br>-40..+85 °C||
 +
|-
 +
| Connectors||204-pin SO-DIMM||
 +
|-
 +
|+ align="bottom" style="caption-side: bottom" | Table: Electrical, Mechanical and Environmental Specifications
 +
|}
  
 
= Design Overview =
 
= Design Overview =

Revision as of 14:48, 23 July 2013

Info Box
Bora5-small.jpg Applies to Bora


Preface[edit | edit source]

About this manual[edit | edit source]

This Hardware Manual describes the Bora CPU module design and functions. Precise specifications for the Xilinx Zynq processor can be found in the CPU datasheets and/or reference manuals.

Copyright/Trademarks[edit | edit source]

Ethernet® is a registered trademark of XEROX Corporation.

All other products and trademarks mentioned in this manual are property of their respective owners.

All rights reserved. Specifications may change at any time without notice.

Standards[edit | edit source]

Dave SrL is certified to ISO 9001 standards.

Disclaimers[edit | edit source]

DAVE does not assume any responsibility about availability, supplying and support regarding all the products mentioned in this manual that are not strictly part of the Bora CPU module. Bora CPU Modules are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Dave Srl customers who are using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Dave Srl for any damage resulting from such improper use or sale.

Warranty[edit | edit source]

Bora is warranted against defects in material and workmanship for the warranty period from the date of shipment. During the warranty period, Dave Srl will at its discretion decide to repair or replace defective products. Within the warranty period, the repair of products is free of charge as long as warranty conditions are observed. The warranty does not apply to defects resulting from improper or inadequate maintenance or handling by the buyer, unauthorized modification or misuse, operation outside of the product’s environmental specifications or improper installation or maintenance. Dave Srl will not be responsible for any defects or damages to other products not supplied by Dave Srl that are caused by a faulty Bora module.

Technical Support[edit | edit source]

We are committed to making our product easy to use and will help customers use our CPU modules in their systems. Technical support is delivered through email to our valued customers. Support requests can be sent to support-bora@dave.eu. Software upgrades are available for download in the restricted access download area of DAVE web site: http://www.dave.eu/reserved-area. An account is required to access this area and is provided to customers who purchase the development kit (please contact support-bora@dave.eu for account requests).. Please refer to our Web site at http://www.dave.eu/dave-cpu-module-zynq-bora.html for the latest product documentation, utilities, drivers, Product Change Notifications, Board Support Packages, Application Notes, mechanical drawings and additional tools and software.

Related Documents[edit | edit source]

Document Location
Dave Developers' Wiki http://wiki.dave.eu/index.php/Main_Page

Table: related documents

Hardware Manual in PDF format[edit | edit source]

Please download the Bora Hardware Manual in pdf format

Conventions, Abbreviations, Acronyms[edit | edit source]

Abbreviation Definition
BTN Button
GPI General Purpose Input
GPIO Generla Purpose Input and Output
GPO General Purpose Output
BELK Bora Embedded Linux Kit
PCB Printed Circuit Board
RTC Real Time Clock
SOM System On Module
PMIC Power Managemente Integrated Circuit



Table: Abbreviations and acronyms used in this manual

Introduction[edit | edit source]

BORA is the new top-class Dual Cortex-A9 + FPGA CPU module by DAVE, based on the recent Xilinx Zynq XC7Z010/XC7Z020 application processor. Thanks to BORA, customers are going to save time and resources by using a compact solution that includes both a CPU and an FPGA, avoiding complexities on the carrier PCB. The use of this processor enables extensive system-level differentiation of new applications in many industry fields, where high performances and extremely compact form factor (85mm x 50mm) are key factors. Smarter system designs are made possible, following the trends in functionalities and interfaces of the new, state-of-the-art embedded products. BORA offers great computational power, thanks to the rich set of peripherals, the Dual Cortex-A9 and the Artix-7 FPGA together with a large set of high-speed I/Os (up to 5GHz). BORA enables designers to create rugged products suitable for harsh mechanical and thermal environments, allowing the development of the most advanced and robust products. Thanks to the tight integration between the ARM-based processing system and the on-chip programmable logic, designers are free to add virtually any peripheral or create custom accelerators that extend system performance and better match specific application requirements. BORA is designed and manufactured according to DAVE Ultra Line specifications, in order to guarantee premium quality and technical value for customers who require top performances and flexibility. BORA is suitable for high-end applications such as medical instrumentation, advanced communication systems, critical real-time operations and safety applications.

Product Highlights[edit | edit source]

  • Unmatched performance thanks to dual ARM Cortex-A9 @ 800 MHz
  • All memories you need: on-board NOR and NAND Flash
  • Enabling smarter system thanks to Artix-7 FPGA integrated on chip
  • FPGA banks with wide-range PSU input (from 1.2V to 3.3V)
  • Highest security and reliability: internal voltage monitoring and power good enable
  • Reduced carrier complexity: dual CAN, USB, Ethernet GB and native 3.3V I/O
  • Easy to fi t thanks to its small form factor
  • Precise timing application thanks to on-board 5ppm RTC

Block Diagram[edit | edit source]

The following image shows Bora's block diagram:

Bora-bd.png

Feature Summary[edit | edit source]

Feature Specifications Options
CPU Xilinx Dual ARM Cortex-A9
ZYNQ XC7Z010/ZC7Z020 @ 800MHz
Cache L1: 32Kbyte instruction, 32Kbyte data
L2: 512Kbyte for each core
RAM DDR3 SDRAM @ 533 MHz
Up to 1 GB
Storage Flash NOR SPI (8, 16, 32 MB)
Flash NAND (all sizes, on request)
Table: CPU and Memories


Feature Specifications Options
Graphics Controller Up to 24-Bits Data Output
Resolution Up to 2048x2048 (With Maximum 126-MHz Pixel Clock)
TFT/RGB support
2D/3D Engine NEON Multimedia SIMD coprocessor
PowerVR SGX 530 3D Accelerator
Coprocessors Crypto Hardware Accelerator (AES, SHA, PKA, RNG)
Up to 2x Programmable Realtime Units (PRUs)
USB Up to 2x 2.0 OTG ports
UARTs Up to 6x UART ports
GPIO Up to 118 lines, shared with other functions (interrupts available)
Input interfaces Integrated 4/5/8-wire resistive touch screen controller
Networking Fast Ethernet with PHY
Additional MII/RMII/RGMII interface
CAN Dual CAN controller (version 2 part A, B)
SD/MMC Up to 3x MMC/SD/SDIO Serial interfaces (up to 48 MHz)
Serial busses Up to 3x I²C channels
Up to 2x SPI channels
Audio Up to 2x McASP interface
Timers Up to N programmable general purpose timers (PWM function available)
RTC and watchdog On board, external battery powered
Debug JTAG IEEE 1149.1 Test Access Port
ETM Port
ETB Port
Miscellaneous Up to 8x 12-bit ADC channels
Table: Peripherals


Feature Specifications Options
Supply Voltage [3.6 - 5.5] V, voltage regulation on board
Active power consumption Please refer to Power consumption section
Dimensions 67.5 mm x 38.3 mm
Weight
MTBF
Operating temperature 0..70 °C
-40..+85 °C
Connectors 204-pin SO-DIMM
Table: Electrical, Mechanical and Environmental Specifications

Design Overview[edit | edit source]

Processor Info[edit | edit source]

RAM memory bank[edit | edit source]

NOR flash bank[edit | edit source]

NAND flash bank[edit | edit source]

Memory map[edit | edit source]

Mechanical specifications[edit | edit source]

This chapter describes the mechanical characteristics of the Bora module.

Board Layout[edit | edit source]

The following figure shows the physical dimensions of the Bora module:

Bora-top-quoted.png

The following figure highlights the maximum components' heights on Bora module:

Bora-side-view-quoted.png

Connectors[edit | edit source]

The following figure shows the Diva connector layout:


Power, reset and control[edit | edit source]

Power Supply Unit (PSU) and recommended power-up sequence[edit | edit source]

The recommended power-up sequence is:

PMIC[edit | edit source]

Reset scheme and voltage monitoring[edit | edit source]

Some of these reset signals are accessible by carrier board circuitry as described below.

EXT_PORSTn[edit | edit source]

PORSTn_OUT[edit | edit source]

WARMRSTn[edit | edit source]

RTC_PWRONRSTn[edit | edit source]

JTAG_TRSTn[edit | edit source]

PMIC_nRESPWRON[edit | edit source]

MRSTn[edit | edit source]

Boot Options[edit | edit source]

Default boot configuration[edit | edit source]

Boot sequence customization[edit | edit source]

Clock scheme[edit | edit source]

Recovery[edit | edit source]

JTAG recovery[edit | edit source]

SD/MMC recovery[edit | edit source]

Multiplexing[edit | edit source]

RTC[edit | edit source]

Watchdog[edit | edit source]

Pinout table[edit | edit source]

This chapter contains the pinout description of the connectors of the Bora module.

Peripheral interfaces[edit | edit source]

Operational Characteristics[edit | edit source]

Maximum ratings[edit | edit source]

Parameter Min Typ Max Unit
Main power supply voltage V

Recommended ratings[edit | edit source]

Parameter Min Typ Max Unit
Main power supply voltage V

Power consumption[edit | edit source]

Heat dissipation[edit | edit source]

This section will be completed in a future version of this manual.

Application notes[edit | edit source]

Please refer to the following documents available on Dave Developers Wiki: