Bureaucrats, dave_user, Administrators
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fix wrong closing tag
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{{AppliesToNaon}}
{{Applies To NaonEVB-Mid}}
{{Applies To Linux}}
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=== Pin Mux Option ===
SPI signals are available at different Naon pins. Please note that '''The configuration described below is dedicated to the NaonEVB-Mid carrier board ''', which provides the SPI1 and SPI3 signals at the '''J21 ''' connector, so the configuration described below is dedicated (please refer to the [[NaonEVB-Mid | NaonEVB-Mid boardwiki page]] for further details).
The following is the pin multiplexing configuration:
|J1.90
|AA3
|-
|
|
|
|-
|SPI3_SCLK
The files <code>board/dave/naon/pinmux_evb_mid.h</code> must be modified according to the following patch:
<syntaxhighlight lang="diff">
diff --git a/board/dave/naon/pinmux_evb_mid.h b/board/dave/naon/pinmux_evb_mid.h
index ae21ca3..df3783f 100644
MUX_VAL(PINCNTL227, (IEN | IPD | DISABLED )) /* safe_mode */\
MUX_VAL(PINCNTL228, (IEN | IPU | FCN7 )) /* I2C[2]_SCL_MUX2 */\
</diffsyntaxhighlight>
U-Boot must be rebuilt to make these modifications effective.
=== Linux kernel patch ===
* SPI1: .bus_num = 2
* SPI3: .bus_num = 4
The kernel must be rebuilt to make these modifications effective.
=== Using the interfaces ===