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Enabling SPI1 and SPI3 on Linux (Naon)

265 bytes added, 10:06, 3 September 2013
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Pin Mux Option
=== Pin Mux Option ===
SPI1 SPI signals are available at different Naon pins. Please note that the NaonEVB-Mid carrier board provides the SPI1 and SPI3 signals at the J21 connector. The following configuration can be used:
==== Option 1 ====
!CPU Ball
|-
|SPI1_SCLK|J1.34|AC3|-|SPI1_SCS1n|J2.112|W6|-|SPI1_D0|J1.37|AA6|-|SPI1_D1|J1.90|AA3
|-
|SPI3_SCLK|J2.99|AC26
|-
|SPI3_SCS1n|J2.111|AG27
|-
|SPI3_D0|J2.89|V22
|-
|SPI3_D1|J2.87|AA25
|}