Difference between revisions of "ETRA SOM/ETRA Hardware/Power and Reset/Power Supply Unit (PSU) and recommended power-up sequence"
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Contents
Power Supply Unit (PSU) and recommended power-up sequence[edit | edit source]
Implementing correct power-up sequence for STM32MP1 processors is not a trivial task because several power rails are involved.
ETRA SOM includes a PMIC that manage all the power on and poweroff timings to ensure the correct sequence
The following picture shows a simplified block diagram of PSU circuitry:
The PMIC:
- generates the proper power-up sequence required by the SOC processor and surrounding memories and peripherals
- synchronizes the powering up of carrier board in order to prevent back power
- provides some spare regulated voltages that can be used to power carrier board devices
Power-up sequence[edit | edit source]
The typical power-up sequence is the following:
- VIN_SOM main power supply rail is powered
- PMIC initiates the powerup sequence needed by STM32MP1 SoC
- VDD rail is powered and the SOM_PGOOD signal is asserted
- PMIC deassert processor reset and check it's status
Note on SOM_PGOOD usage[edit | edit source]
SOM_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals.
Depending on the kind of such loads, SOM_PGOOD might not be able to drive them properly. On ETRA SOM this signal is driven by the VDD rail so, if many loads has to be driven, connect them to the VDD output pins through a resistor.
