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<section begin="History" />
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!colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History
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|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|X.Y.Z2021/02/24|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|Month Year|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|TBD|-|-|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|[TBD_link X.Y.Z]|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|Month Year|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|TBD|-|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|...|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|...|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|...First Release
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<section end="History" /> __FORCETOC__ <section begin="Body" />
== Power Supply Unit (PSU) and recommended power-up sequence ==
Implementing correct power-up sequence for ''TBD: SOC ''' STM32MP1 processors is not a trivial task because several power rails are involved.  ETRA SOM includes a PMIC that manage all the power on and poweroff timings to ensure the correct sequence
ETRA SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:
[[File:ETRA-power-sequence.png | 800px]]
The PSU is composed of two main blocks: * power management integrated circuit* additional generic power management circuitry that completes PMIC functionalities The PSU:
* generates the proper power-up sequence required by the SOC processor and surrounding memories and peripherals
* synchronizes the powering up of carrier board in order to prevent back power
=== Power-up sequence===
''TBDThe typical power-up sequence is the following: descrizione dei segnali che intervengono nella PS''# VIN_SOM main power supply rail is powered==== Note on BOARD_PGOOD usage ====# PMIC initiates the powerup sequence needed by STM32MP1 SoC ''TBD: verificare le note sul BOARD_PGOOD'' BOARD_PGOOD # VDD rail is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals.  Depending on powered and the kind of such loads, BOARD_PGOOD might not be able to drive them properly. In these cases a simple 2-input AND port can be used to address this issue. The following picture depicts a principle schematic showing this solution. SOM_PGOOD signal is asserted VDD_SOM denotes the power rail used to power ETRA SoM. # PMIC deassert processor reset and check it's status
[[File:ETRA-power-good.png]]==== Note on SOM_PGOOD usage ====
SOM_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals.
Depending on the kind of such loads, SOM_PGOOD might not be able to drive them properly. On ETRA SOM this signal is driven by the VDD rail so, if many loads has to be driven, connect them to the VDD output pins through a resistor.
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[[Category:ETRA]]
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