Open main menu

DAVE Developer's Wiki β

Changes

ETRA SOM/ETRA Hardware/Pinout Table

3,401 bytes added, 15:41, 28 November 2023
no edit summary
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
|-
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Version
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |0.9.0{{oldid| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" 13190|Dec 2020/12/31}}| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |First Draftrelease
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|18542|2023/06/09}}
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Pinout update
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |[TBD_link X.Y.Z]{{oldid| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" 18979|Month Year2023/11/23}}| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |TBDPinout update
|-
| ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fbededed; padding:5px; color:#000000" |...2023/11/28| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |...| ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fbededed; padding:5px; color:#000000" |...Add pinmux spreadsheet download
|-
|}
<section end="History" />
<section begin="Body" />
''TBD: modificare la tabella seguente con le caratteristiche dei pin del SOM''
 
''TBD: modificare le due tabelle ODD e EVEN con la mappa completa dei pins''
 
'''TBD: nella tabella naming conventions, inserire il codice dei vari IC presenti (PMIC, PHY ETH, ecc.)'''
<section end="History" /><section begin="Body" /><section end="History" /><section begin="Body" />
==Connectors and Pinout Table==
=== Connectors description ===
In the following table are described all available connectors integrated on [[ETRASOM]]:
{| class="wikitable"
|-
The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to ETRA pinout specifications. See the images below for reference:
[[File:ETRAETRA_SOM_-top_top_pin1_203.png|500px|thumb|ETRA TOP view|none]][[File:ETRAETRA_SOM_-bottom_bottom_pin2_204.png|500px|thumb|ETRA BOTTOM view|none]]
===Pinout table naming conventions ===
This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the ''TBD: connector type'' ETRA SODIMM-DDR3 edge connector.
Each row in the pinout tables contains the following information:
|-
|}
 
===Pinout table XLS file ===
For your convenience, please find a spreadsheet with the STM32MP15x pinout and pinmux table [https://www.dave.eu/links/p/2hxFRECdQPg6uJOy here].
==Pinout Table ODD pins declaration ==
|-
|J1.15
| -VINTLDO|NCPMIC.INTLDO| -40| -INTLDO| -S|do not connect
|
|
|-
|J1.33
| -ETH_INT|NCLAN.INTRP| -18| -VDD| -O|open drain with internal pull-up to VDD
|
|
|G
|
|
|
|-
|J1.37
(NAND on board)
|PD1
|CPU.PD1
|A4
|VDD
|I/O
|internally used for NAND flash,
do not connect
|
|
|Pin AF15
|EVENTOUT
|-
|J1.39
(NAND on board)
|PD4
|CPU.PD4
|D6
|VDD
|I/O
|internally used for NAND flash,
do not connect
|
|
|-
| rowspan="6" |J1.39
| rowspan="6" |VDD
| rowspan="6" |I/O
| rowspan="6" |TBD
|Pin AF6
|SAI3_FS_A
|Pin AF15
|EVENTOUT
|-
|J1.41
(NAND on board)
|PD5
|CPU.PD5
|D7
|VDD
|I/O
|internally used for NAND flash,
do not connect
|
|
|-
| rowspan="4" |J1.41
| rowspan="4" |VDD
| rowspan="4" |I/O
| rowspan="4" |TBD
|Pin AF7
|USART2_TX
| rowspan="9" |VDD
| rowspan="9" |I/O
| rowspan="9" |TBD
|Pin AF0
|TRACED6
|Pin AF15
|EVENTOUT
|-
|J1.45
 
(NAND on board)
|PD0
|CPU.PD0
|A3
|VDD
|I/O
|internally used for NAND flash,
 
do not connect
|
|
|-
| rowspan="10" |J1.45
| rowspan="10" |VDD
| rowspan="10" |I/O
| rowspan="10" |TBD
|Pin AF2
|I2C6_SDA
| rowspan="8" |VDD
| rowspan="8" |I/O
| rowspan="8" |TBD
|Pin AF0
|TRACED7
|Pin AF15
|EVENTOUT
|-
|J1.49
(NOR on board)
|PF10
|CPU.PF10
|U9
|VDD
|I/O
|internally used for NOR flash,
do not connect
|
|
|-
| rowspan="9" |J1.49
| rowspan="9" |VDD
| rowspan="9" |I/O
| rowspan="9" |TBD
|Pin AF1
|TIM16_BKIN
|Pin AF15
|EVENTOUT
|-
|J1.51
(NAND on board)
|PE7
|CPU.PE7
|T10
|VDD
|I/O
|internally used for NAND flash,
do not connect
|
|
|-
| rowspan="7" |J1.51
| rowspan="7" |VDD
| rowspan="7" |I/O
| rowspan="7" |TBD
|Pin AF1
|TIM1_ETR
|Pin AF15
|EVENTOUT
|-
|J1.53
(NAND on board)
|PE8
|CPU.PE8
|T11
|VDD
|I/O
|internally used for NAND flash,
do not connect
|
|
|-
| rowspan="6" |J1.53
| rowspan="6" |VDD
| rowspan="6" |I/O
| rowspan="6" |TBD
|Pin AF1
|TIM1_CH1N
|-
|J1.55
| -NOR_WP#|NOR.WPn|NCC4| -VDD| -I/O| internal pull-up to VDD,|this NOR pin is shared with QSPI_IO2 function
|
|
| -
|
|
|
|-
|J1.61
(eMMC on board)
|PB14
|CPU.PB14
|C9
|VDD
|I/O
|internally used for eMMC flash,
do not connect
|
|
| rowspan="9" |VDD
| rowspan="9" |I/O
| rowspan="9" |TBD
|Pin AF1
|TIM1_CH2N
|Pin AF15
|EVENTOUT
|-
|J1.63
 
(eMMC on board)
|PB15
|CPU.PB15
|A8
|VDD
|I/O
|internally used for eMMC flash,
 
do not connect
|
|
|-
| rowspan="9" |J1.63
| rowspan="9" |VDD
| rowspan="9" |I/O
| rowspan="9" |TBD
|Pin AF0
|RTC_REFIN
|Pin AF15
|EVENTOUT
|-
|J1.65
 
(eMMC on board)
|PB3
|CPU.PB3
|A7
|VDD
|I/O
|internally used for eMMC flash,
 
do not connect
|
|
|-
| rowspan="10" |J1.65
| rowspan="10" |VDD
| rowspan="10" |I/O
| rowspan="10" |TBD
|Pin AF0
|TRACED9
|Pin AF15
|EVENTOUT
|-
|J1.67
 
(eMMC on board)
|PB4
|CPU.PB4
|B9
|VDD
|I/O
|internally used for eMMC flash,
 
do not connect
|
|
|-
| rowspan="12" |J1.67
| rowspan="12" |VDD
| rowspan="12" |I/O
| rowspan="12" |TBD
|Pin AF0
|TRACED8
|Pin AF15
|EVENTOUT
|-
|J1.69
(eMMC on board)
|PG6
|CPU.PG6
|A6
|VDD
|I/O
|internally used for eMMC flash,
 
do not connect
|
|
|-
| rowspan="6" |J1.69
| rowspan="6" |VDD
| rowspan="6" |I/O
| rowspan="6" |TBD
|Pin AF0
|TRACED14
|Pin AF15
|EVENTOUT
|-
|J1.71
(eMMC on board)
|PE3
|CPU.PE3
|A5
|VDD
|I/O
|internally used for eMMC flash,
 
do not connect
|
|
|-
| rowspan="6" |J1.71
| rowspan="6" |VDD
| rowspan="6" |I/O
| rowspan="6" |TBD
|Pin AF0
|TRACED0
| rowspan="9" |VDD
| rowspan="9" |I/O
| rowspan="9" |TBD
|Pin AF0
|TRACED0
| rowspan="11" |VDD
| rowspan="11" |I/O
| rowspan="11" |TBD
|Pin AF0
|TRACED1
| rowspan="13" |VDD
| rowspan="13" |I/O
| rowspan="13" |TBDfor LCD_G1 functionuse pin J1.180 (RGB lenght match)
|Pin AF0
|TRACED2
|DCMI_D7
|-
|<s>Pin AF14</s>|<s>LCD_G1</s>
|-
|Pin AF15
| rowspan="10" |VDD
| rowspan="10" |I/O
| rowspan="10" |TBD
|Pin AF0
|TRACED3
| rowspan="7" |VDD
| rowspan="7" |I/O
| rowspan="7" |TBD
|Pin AF2
|TIM3_ETR
| rowspan="10" |VDD
| rowspan="10" |I/O
| rowspan="10" |TBD
|Pin AF0
|TRACECLK
| rowspan="7" |VDD
| rowspan="7" |I/O
| rowspan="7" |TBD
|Pin AF3
|DFSDM1_CKIN3
| rowspan="7" |VDD
| rowspan="7" |I/O
| rowspan="7" |TBD
|Pin AF3
|DFSDM1_DATIN3
|EVENTOUT
|-
|J1.93(I/O EXP on board)|PC2|CPU.PC2|T2|VDD|I/O|internally used for I/O EXP, do not connect|||-| rowspan="67" |J1.93| rowspan="67" |PC2| rowspan="67" |CPU.PC2| rowspan="67" |T2| rowspan="67" |VDD| rowspan="67" |I/O| rowspan="67" |TBD
|Pin AF3
|DFSDM1_CKIN1
|EVENTOUT
|-
| rowspan="10" |J1.95| rowspan="10" |PA0| rowspan="10" |CPU.PA0| rowspan="10" |R3Additional| rowspan="10" |VDDfunctions| rowspan="10" |I/OADC1_INP12| rowspan="10" |TBD|Pin AF1|TIM2_CH1/TIM2_ETRADC1_INN11
|-
|Pin AF2J1.95|TIM5_CH1PA0|-CPU.PA0|R3|VDD|I/O|internally used for PMIC, do not connect|Pin AF3|TIM8_ETR
|-
|Pin AF4|TIM15_BKIN|-|Pin AF7|USART2_CTS/USART2_NSS|-|Pin AF8|UART4_TX|-|Pin AF9|SDMMC2_CMD|-|Pin AF10|SAI2_SD_B|-|Pin AF11|ETH1_GMII_CRS/ ETH1_MII_CRS|-|Pin AF15|EVENTOUT|-| rowspan="1311" |J1.97| rowspan="1311" |PD13| rowspan="1311" |CPU.PD13| rowspan="1311" |U12| rowspan="1311" |VDD| rowspan="1311" |I/O| rowspan="1311" |TBD
|Pin AF1
|LPTIM1_OUT
|-
|Pin AF9
|SDMMC2_D7QUADSPI_BK1_IO3
|-
|Pin AF10
|SDMMC2_D123DIR|-|Pin AF11|SDMMC1_D7SAI2_SCK_A
|-
|Pin AF12
|FMC_CLKFMC_A18
|-
|Pin AF13
|DCMI_D5|-|Pin AF14|LCD_G7DSI_TE
|-
|Pin AF15
|EVENTOUT
|-
|J1.99(NAND on board)|PD12|CPU.PD12|U11|VDD|I/O|internally used for NAND flash,do not connect|||-| rowspan="10" |J1.99
| rowspan="10" |PD12
| rowspan="10" |CPU.PD12
| rowspan="10" |VDD
| rowspan="10" |I/O
| rowspan="10" |TBD
|Pin AF1
|LPTIM1_IN1
|Pin AF15
|EVENTOUT
|-
|J1.101
(NAND on board)
|PD11
|CPU.PD11
|V8
|VDD
|I/O
|internally used for NAND flash,
 
do not connect
|
|
|-
| rowspan="8" |J1.101
| rowspan="8" |VDD
| rowspan="8" |I/O
| rowspan="8" |TBD
|Pin AF3
|LPTIM2_IN2
| -
|
|
|
|-
|J1.105
(NAND on board)
|PG9
|CPU.PG9
|T14
|VDD
|I/O
|internally used for NAND flash,
 
do not connect
|
|
| rowspan="9" |VDD
| rowspan="9" |I/O
| rowspan="9" |TBD
|Pin AF0
|DBTRGO
| rowspan="2" |VDD
| rowspan="2" |I/O
| rowspan="2" |TBD
|Pin AF0
|Keypad row 7
| rowspan="2" |VDD
| rowspan="2" |I/O
| rowspan="2" |TBD
|Pin AF0
|Keypad row 6
| rowspan="2" |VDD
| rowspan="2" |I/O
| rowspan="2" |TBD
|Pin AF0
|Keypad row 5
| rowspan="3" |VDD
| rowspan="3" |I/O
| rowspan="3" |TBD
|Pin AF0
|Keypad row 4
| rowspan="5" |VDD
| rowspan="5" |I/O
| rowspan="5" |TBD
|Pin AF0
|Keypad row 3
| rowspan="3" |VDD
| rowspan="3" |I/O
| rowspan="3" |TBD
|Pin AF0
|Keypad row 2
| rowspan="3" |VDD
| rowspan="3" |I/O
| rowspan="3" |TBD
|Pin AF0
|Keypad row 1
| rowspan="3" |VDD
| rowspan="3" |I/O
| rowspan="3" |TBD
|Pin AF0
|Keypad row 0
| rowspan="2" |VDD
| rowspan="2" |I/O
| rowspan="2" |TBD
|Pin AF0
|Keypad column 0
| rowspan="2" |VDD
| rowspan="2" |I/O
| rowspan="2" |TBD
|Pin AF0
|Keypad column 1
| rowspan="2" |VDD
| rowspan="2" |I/O
| rowspan="2" |TBD
|Pin AF0
|Keypad column 2
| rowspan="2" |VDD
| rowspan="2" |I/O
| rowspan="2" |TBD
|Pin AF0
|Keypad column 3
| rowspan="3" |VDD
| rowspan="3" |I/O
| rowspan="3" |TBD
|Pin AF0
|Keypad column 4
| rowspan="2" |VDD
| rowspan="2" |I/O
| rowspan="2" |TBD
|Pin AF0
|Keypad column 5
| rowspan="5" |VDD
| rowspan="5" |I/O
| rowspan="5" |TBD
|Pin AF0
|Keypad column 6
| rowspan="3" |VDD
| rowspan="3" |I/O
| rowspan="3" |TBD
|Pin AF0
|Keypad column 7
| rowspan="3" |VDD
| rowspan="3" |I/O
| rowspan="3" |TBD
|Pin AF0
|Keypad column 8
| rowspan="3" |VDD
| rowspan="3" |I/O
| rowspan="3" |TBD
|Pin AF0
|Keypad column 9
| rowspan="2" |VDD
| rowspan="2" |I/O
| rowspan="2" |TBD
|Pin AF0
|Keypad column 10
|G
|
|
|
|-
|J1.177
 
(NAND on board)
|PE9
|CPU.PE9
|W7
|VDD
|I/O
|internally used for NAND flash,
do not connect
|
|
| rowspan="6" |VDD
| rowspan="6" |I/O
| rowspan="6" |TBD
|Pin AF1
|TIM1_CH1
|EVENTOUT
|-
|J1.179 (I/O EXP on board)|PC3|CPU.PC3|T3|VDD|I/O|internally used for I/O EXP, do not connect|||-| rowspan="56" |J1.179| rowspan="56" |PC3| rowspan="56" |CPU.PC3| rowspan="56" |T3| rowspan="56" |VDD| rowspan="56" |I/O| rowspan="56" |TBD
|Pin AF0
|TRACECLK
|Pin AF15
|EVENTOUT
|-
|Additional
functions
|ADC1_INP13
 
ADC1_INN12
|-
|J1.181
 
(NAND on board)
|PD6
|CPU.PD6
|E3
|VDD
|I/O
|internally used for NAND flash,
 
do not connect
|
|
|-
| rowspan="11" |J1.181
| rowspan="11" |VDD
| rowspan="11" |I/O
| rowspan="11" |TBD
|Pin AF1
|TIM16_CH1N
|Pin AF15
|EVENTOUT
|-
|J1.183
 
(NAND on board)
|PE10
|CPU.PE10
|V10
|VDD
|I/O
|internally used for NAND flash,
 
do not connect
|
|
|-
| rowspan="6" |J1.183
| rowspan="6" |VDD
| rowspan="6" |I/O
| rowspan="6" |TBD
|Pin AF1
|TIM1_CH2N
| rowspan="8" |VDD
| rowspan="8" |I/O
| rowspan="8" |TBD
|Pin AF0
|TRACED11
| rowspan="11" |VDD
| rowspan="11" |I/O
| rowspan="11" |TBD
|Pin AF0
|TRACED4
| rowspan="7" |VDD
| rowspan="7" |I/O
| rowspan="7" |TBD
|Pin AF1
|LPTIM1_IN2
| rowspan="10" |VDD
| rowspan="10" |I/O
| rowspan="10" |TBD
|Pin AF1
|LPTIM1_ETR
|EVENTOUT
|-
| rowspan="9" |J1.195| rowspan="9" |PE2| rowspan="9" |CPU.PE2| rowspan="9" |T1| rowspan="9" |VDD| rowspan="9" |I/O| rowspan="9" |TBD|Pin AF0|TRACECLKinternally used for|-|Pin AF2|SAI1_CK1|-PMIC I2C
|Pin AF4
|I2C4_SCL
|-
|Pin AF5|SPI4_SCK|-|Pin AF6|SAI1_MCLK_A|-|Pin AF9|QUADSPI_BK1_IO2|-|Pin AF11|ETH1_GMII_TXD3/J1.197
ETH1_MII_TXD3(LAN PHY on board)|PA13|CPU.PA13|P2|VDD|I/O|internally used for LAN PHY,
ETH1_RGMII_TXD3do not connect||
|-
|Pin AF12|FMC_A23|-|Pin AF15|EVENTOUT|-| rowspan="56" |J1.197| rowspan="56" |PA13| rowspan="56" |CPU.PA13| rowspan="56" |P2| rowspan="56" |VDD| rowspan="56" |I/O| rowspan="56" |TBD
|Pin AF0
|DBTRGO
|Pin AF15
|EVENTOUT
|-
|Additional
functions
|BOOTFAILN
|-
|J1.199
 
(NAND on board)
|PD14
|CPU.PD14
|F3
|VDD
|I/O
|internally used for NAND flash,
 
do not connect
|
|
|-
| rowspan="5" |J1.199
| rowspan="5" |VDD
| rowspan="5" |I/O
| rowspan="5" |TBDinternally used forNAND flash
|Pin AF2
|TIM4_CH3
|Pin AF15
|EVENTOUT
|-
|J1.201
(NAND on board)
|PD15
|CPU.PD15
|G1
|VDD
|I/O
|internally used for NAND flash,
 
do not connect
|
|
|-
| rowspan="5" |J1.201
| rowspan="5" |VDD
| rowspan="5" |I/O
| rowspan="5" |TBDinternally used forNAND flash
|Pin AF2
|TIM4_CH4
|VDD
|O
|internally connected to VDD
|
|
|VDD
|I
|internall internal pull-up or pull-down
according to specific model
|
|VDD
|I/O
|TBDinternal 10k pull-up to VDD
|
|
|VDD
|I
|internall internal pull-up or pull-down
according to specific model
|
| rowspan="9" |VDD
| rowspan="9" |I/O
| rowspan="9" |TBD
|Pin AF1
|TIM1_CH2
| rowspan="10" |VDD
| rowspan="10" |I/O
| rowspan="10" |TBD
|Pin AF1
|TIM1_CH1N
|VDD
|I
|internall internal pull-up or pull-down
according to specific model
|
|
|-
| rowspan="910" |J1.38| rowspan="910" |PA11| rowspan="910" |CPU.PA11| rowspan="910" |V17| rowspan="910" |VDD| rowspan="910" |I/O| rowspan="910" |TBD
|Pin AF1
|TIM1_CH4
|Pin AF15
|EVENTOUT
|-
|Additional
functions
|OTG_FS_DM
|-
|J1.40
|MEM_WPNAND_WP#|NAND.NWPNOR.NWPWPn
|19
C4
|VDD
|I/O
|internal pull-up to VDD
|
|
|-
|J1.42
 
(NOR on board)
|PB6
|CPU.PB6
|T12
|VDD
|I/O
|internally used for NOR flash.
do not connect
|
|
| rowspan="12" |VDD
| rowspan="12" |I/O
| rowspan="12" |TBD
|Pin AF1
|TIM16_CH1N
|EVENTOUT
|-
| rowspan="10" |J1.44| rowspan="10" |PB7| rowspan="10" |CPU.PB7| rowspan="10" |B5| rowspan="10" |VDD| rowspan="10" |I/O| rowspan="10" |TBD|Pin AF1|TIM17_CH1N|-|Pin AF2internally used for|TIM4_CH2|-PMIC I2C|Pin AF4AF6
|I2C1_SDA
|-
|Pin AF6|I2C4_SDA|-|Pin AF7|USART1_RX|-|Pin AF10|SDMMC2_D1|-|Pin AF11|DFSDM1_CKIN5|-|Pin AF12|FMC_NL|-|Pin AF13|DCMI_VSYNC|-|Pin AF15|EVENTOUT|-| rowspan="9" |J1.46
| rowspan="9" |PE14
| rowspan="9" |CPU.PE14
| rowspan="9" |VDD
| rowspan="9" |I/O
| rowspan="9" |TBD
|Pin AF1
|TIM1_CH4
|EVENTOUT
|-
| rowspan="910" |J1.48| rowspan="910" |PA12| rowspan="910" |CPU.PA12| rowspan="910" |U16| rowspan="910" |VDD| rowspan="910" |I/O| rowspan="910" |TBD
|Pin AF1
|TIM1_ETR
|Pin AF15
|EVENTOUT
|-
|Additional
functions
|OTG_FS_DP
|-
|J1.50
| rowspan="4" |VDD
| rowspan="4" |I/O
| rowspan="4" |TBD
|Pin AF0
|DBTRGO
| rowspan="11" |VDD
| rowspan="11" |I/O
| rowspan="11" |TBD
|Pin AF1
|LPTIM1_IN1
| rowspan="16" |VDD
| rowspan="16" |I/O
| rowspan="16" |TBD
|Pin AF0
|ETH_CLK
| rowspan="13" |VDD
| rowspan="13" |I/O
| rowspan="13" |TBD
|Pin AF0
|TRACED15
| rowspan="13" |VDD
| rowspan="13" |I/O
| rowspan="13" |TBD
|Pin AF0
|MCO1
|Pin AF15
|EVENTOUT
|-
|J1.74
 
(NOR on board)
|PF7
|CPU.PF7
|W8
|VDD
|I/O
|internally used for NOR flash.
do not connect
|
|
|-
| rowspan="6" |J1.74
| rowspan="6" |VDD
| rowspan="6" |I/O
| rowspan="6" |TBD
|Pin AF1
|TIM17_CH1
|Pin AF15
|EVENTOUT
|-
|J1.76
 
(NOR on board)
|PF9
|CPU.PF9
|W9
|VDD
|I/O
|internally used for NOR flash.
 
do not connect
|
|
|-
| rowspan="8" |J1.76
| rowspan="8" |VDD
| rowspan="8" |I/O
| rowspan="8" |TBD
|Pin AF0
|TRACED13
|EVENTOUT
|-
|J1.78 (NOR on board)|PF8|CPU.PF8|U10|VDD|I/O|internally used for NOR flash. do not connect|||-| rowspan="8" |J1.78
| rowspan="8" |PF8
| rowspan="8" |CPU.PF8
| rowspan="8" |VDD
| rowspan="8" |I/O
| rowspan="8" |TBD
|Pin AF0
|TRACED12
|Pin AF15
|EVENTOUT
|-
|J1.80
 
(NOR on board)
|PF6
|CPU.PF6
|V9
|VDD
|I/O
|internally used for NOR flash.
 
do not connect
|
|
|-
| rowspan="7" |J1.80
| rowspan="7" |VDD
| rowspan="7" |I/O
| rowspan="7" |TBD
|Pin AF1
|TIM16_CH1
|VDD
|I/O
|TBD
|
|
|VDD
|I/O
|TBD
|
|
|VDD
|I/O
|TBD
|
|
|VDD
|I/O
|TBD
|
|
|VDD
|I/O
|TBD
|
|
| rowspan="9" |VDD
| rowspan="9" |I/O
| rowspan="9" |TBD
|Pin AF0
|HDP2
|VDD
|I/O
|TBDinternally used for PMIC,do not connect|Pin AF15|EVENTOUT
|-
| rowspan="1112" |J1.128| rowspan="1112" |PA4| rowspan="1112" |CPU.PA4| rowspan="1112" |R4| rowspan="1112" |VDD| rowspan="1112" |I/O| rowspan="1112" |TBD
|Pin AF0
|HDP0
|EVENTOUT
|-
|Additionalfunctions|ADC1_INP18 ADC2_INP18 DAC_OUT1|-|J1.130 (eMMC 8-bit on board)|PC6_OPT|CPU.PC6|D10|VDD|I/O|internally used for eMMC,do not connect|||-| rowspan="1614" |J1.130| rowspan="1614" |PC6_OPT| rowspan="1614" | -CPU.PC6| rowspan="1614" | -D10| rowspan="1614" |VDD| rowspan="1614" |I/O| rowspan="1614" |TBD
|Pin AF0
|TBD|-|Pin AF1|TBDHDP1
|-
|Pin AF2
|TBDTIM3_CH1
|-
|Pin AF3
|TBDTIM8_CH1
|-
|Pin AF4
|TBDDFSDM1_CKIN3
|-
|Pin AF5
|TBD|-|Pin AF6|TBDI2S2_MCK
|-
|Pin AF7
|TBDUSART6_TX
|-
|Pin AF8
|TBDSDMMC1_D0DIR
|-
|Pin AF9
|TBDSDMMC2_D0DIR
|-
|Pin AF10
|TBDSDMMC2_D6
|-
|Pin AF11
|TBDDSI_TE
|-
|Pin AF12
|TBDSDMMC1_D6
|-
|Pin AF13
|TBDDCMI_D0
|-
|Pin AF14
|TBDLCD_HSYNC
|-
|Pin AF15
| rowspan="9" |VDD
| rowspan="9" |I/O
| rowspan="9" |TBD
|Pin AF0
|TRACED5
| rowspan="9" |VDD
| rowspan="9" |I/O
| rowspan="9" |TBD
|Pin AF0
|TRACED10
| rowspan="10" |VDD
| rowspan="10" |I/O
| rowspan="10" |TBD
|Pin AF0
|RTC_REFIN
| rowspan="8" |VDD
| rowspan="8" |I/O
| rowspan="8" |TBD
|Pin AF1
|TIM1_CH3N
|EVENTOUT
|-
| rowspan="910" |J1.140| rowspan="910" |PA3| rowspan="910" |CPU.PA3| rowspan="910" |P3| rowspan="910" |VDD| rowspan="910" |I/O| rowspan="910" |TBD
|Pin AF1
|TIM2_CH4
|Pin AF15
|EVENTOUT
|-
|Additional
functions
|ADC1_INP15
 
PVD_IN
|-
| rowspan="16" |J1.142
| rowspan="16" |VDD
| rowspan="16" |I/O
| rowspan="16" |TBD
|Pin AF0
|HDP6
| rowspan="16" |VDD
| rowspan="16" |I/O
| rowspan="16" |TBD
|Pin AF0
|HDP7
|
|-
| rowspan="1213" |J1.148| rowspan="1213" |PA6| rowspan="1213" |CPU.PA6| rowspan="1213" |T5| rowspan="1213" |VDD| rowspan="1213" |I/O| rowspan="1213" |TBD
|Pin AF1
|TIM1_BKIN
|Pin AF15
|EVENTOUT
|-
|Additional
functions
|ADC1_INP3
 
ADC2_INP3
|-
| rowspan="9" |J1.150
| rowspan="9" |VDD
| rowspan="9" |I/O
| rowspan="9" |TBD
|Pin AF1
|TIM1_CH2
| rowspan="10" |VDD
| rowspan="10" |I/O
| rowspan="10" |TBD
|Pin AF1
|TIM2_CH3
|EVENTOUT
|-
| rowspan="56" |J1.154| rowspan="56" |PF11| rowspan="56" |CPU.PF11| rowspan="56" |U5| rowspan="56" |VDD| rowspan="56" |I/O| rowspan="56" |TBD
|Pin AF5
|SPI5_MOS
|Pin AF15
|EVENTOUT
|-
|Additional
functions
|ADC1_INP2
|-
| rowspan="13" |J1.156
| rowspan="13" |VDD
| rowspan="13" |I/O
| rowspan="13" |TBD
|Pin AF0
|HDP4
|EVENTOUT
|-
|J1.158 (eMMC 8-bit on board)|PD3_OPT|CPU.PD3|C6|VDD|I/O|internally used for eMMC,do not connect|||-| rowspan="1613" |J1.158| rowspan="1613" |PD3_OPT| rowspan="1613" | -CPU.PD3| rowspan="1613" | -C6| rowspan="1613" |VDD| rowspan="1613" |I/O| rowspan="1613" |TBD
|Pin AF0
|TBDHDP5
|-
|Pin AF1|TBD|-|Pin AF2|TBD|-|Pin AF3|TBD|-|Pin AF4|TBDDFSDM1_CKOUT
|-
|Pin AF5
|TBDSPI2_SCK/I2S2_CK
|-
|Pin AF6
|TBDDFSDM1_DATIN0
|-
|Pin AF7
|TBDUSART2_CTS/USART2_NSS
|-
|Pin AF8
|TBDSDMMC1_D123DIR
|-
|Pin AF9
|TBDSDMMC2_D7
|-
|Pin AF10
|TBDSDMMC2_D123DIR
|-
|Pin AF11
|TBDSDMMC1_D7
|-
|Pin AF12
|TBDFMC_CLK
|-
|Pin AF13
|TBDDCMI_D5
|-
|Pin AF14
|TBDLCD_G7
|-
|Pin AF15
| rowspan="11" |VDD
| rowspan="11" |I/O
| rowspan="11" |TBD
|Pin AF0
|TRACED2
|EVENTOUT
|-
| rowspan="1011" |J1.162| rowspan="1011" |PB0| rowspan="1011" |CPU.PB0| rowspan="1011" |W3| rowspan="1011" |VDD| rowspan="1011" |I/O| rowspan="1011" |TBD
|Pin AF1
|TIM1_CH2N
|Pin AF15
|EVENTOUT
|-
|Additional
functions
|ADC1_INP9
 
ADC1_INN5
 
ADC2_INP9
 
ADC2_INN5
|-
|J1.164
|
|-
| rowspan="89" |J1.166| rowspan="89" |PA5| rowspan="89" |CPU.PA5| rowspan="89" |P4| rowspan="89" |VDD| rowspan="89" |I/O| rowspan="89" |TBD
|Pin AF1
|TIM2_CH1/TIM2_ETR
|EVENTOUT
|-
|Additionalfunctions|ADC1_INP19 ADC1_INN18 ADC2_INP19 ADC2_INN18 DAC_OUT2|-| rowspan="78" |J1.168| rowspan="78" |PC0| rowspan="78" |CPU.PC0| rowspan="78" |T7| rowspan="78" |VDD| rowspan="78" |I/O| rowspan="78" |TBD
|Pin AF3
|DFSDM1_CKIN0
|EVENTOUT
|-
|Additionalfunctions|ADC1_INP10 ADC2_INP10|-| rowspan="910" |J1.170| rowspan="910" |PB1| rowspan="910" |CPU.PB1| rowspan="910" |V3| rowspan="910" |VDD| rowspan="910" |I/O| rowspan="910" |TBD
|Pin AF1
|TIM1_CH3N
|Pin AF15
|EVENTOUT
|-
|Additional
functions
|ADC1_INP5
 
ADC2_INP5
|-
| rowspan="9" |J1.172
| rowspan="9" |VDD
| rowspan="9" |I/O
| rowspan="9" |TBD
|Pin AF0
|HDP3
|EVENTOUT
|-
|J1.174 (eMMC 8-bit on board)|PE4_OPT|CPU.PE4|B11|VDD|I/O|internally used for eMMC,do not connect|||-| rowspan="1614" |J1.174| rowspan="1614" |PE4_OPT| rowspan="1614" | -CPU.PE4| rowspan="1614" | -B11| rowspan="1614" |VDD| rowspan="1614" |I/O| rowspan="1614" |TBD
|Pin AF0
|TBD|-|Pin AF1|TBDTRACED1
|-
|Pin AF2
|TBDSAI1_D2
|-
|Pin AF3
|TBDDFSDM1_DATIN3
|-
|Pin AF4
|TBDTIM15_CH1N
|-
|Pin AF5
|TBDSPI4_NSS
|-
|Pin AF6
|TBDSAI1_FS_A
|-
|Pin AF7
|TBDSDMMC2_CKIN
|-
|Pin AF8
|TBDSDMMC1_CKIN
|-
|Pin AF9
|TBD|-|Pin AF10|TBDSDMMC2_D4
|-
|Pin AF11
|TBDSDMMC1_D4
|-
|Pin AF12
|TBDFMC_A20
|-
|Pin AF13
|TBDDCMI_D4
|-
|Pin AF14
|TBDLCD_B0
|-
|Pin AF15
|EVENTOUT
|-
| rowspan="89" |J1.176| rowspan="89" |PA10| rowspan="89" |CPU.PA10| rowspan="89" |T16| rowspan="89" |VDD| rowspan="89" |I/O| rowspan="89" |TBD
|Pin AF1
|TIM1_CH3
|Pin AF15
|EVENTOUT
|-
|Additional
functions
|OTG_FS_ID
 
OTG_HS_ID
|-
| rowspan="14" |J1.178
| rowspan="14" |VDD
| rowspan="14" |I/O
| rowspan="14" |TBD
|Pin AF0
|TRACED3
|EVENTOUT
|-
| rowspan="1613" |J1.180| rowspan="1613" |PE6_OPT| rowspan="1613" | -CPU.PE6| rowspan="1613" | -B3| rowspan="1613" |VDD| rowspan="1613" |I/O| rowspan="1613" |TBDfor SDMMC1_D2 functionuse pin J1.79 (SDMMC lenght match)
|Pin AF0
|TBDTRACED2
|-
|Pin AF1
|TBDTIM1_BKIN2
|-
|Pin AF2
|TBD|-|Pin AF3|TBDSAI1_D1
|-
|Pin AF4
|TBDTIM15_CH2
|-
|Pin AF5
|TBDSPI4_MOSI
|-
|Pin AF6
|TBDSAI1_SD_A
|-
|Pin AF7
|TBD|-|Pin AF8|TBDSDMMC2_D0
|-
|<s>Pin AF9AF8</s>|TBD<s>SDMMC1_D2</s>
|-
|Pin AF10
|TBD|-|Pin AF11|TBDSAI2_MCLK_B
|-
|Pin AF12
|TBDFMC_A22
|-
|Pin AF13
|TBDDCMI_D7
|-
|Pin AF14
|TBDLCD_G1
|-
|Pin AF15
| rowspan="12" |VDD
| rowspan="12" |I/O
| rowspan="12" |TBD
|Pin AF0
|TRACED0
|Pin AF15
|EVENTOUT
|-
|J1.184
 
(eMMC 8-bit
 
on board)
|PA15_OPT
|CPU.PA15
|C7
|VDD
|I/O
|internally used for eMMC,
do not connect
|
|
|-
| rowspan="16" |J1.184
| rowspan="16" |PA15_OPT
| rowspan="16" | -CPU.PA15| rowspan="16" | -C7
| rowspan="16" |VDD
| rowspan="16" |I/O
| rowspan="16" |TBD
|Pin AF0
|TBDDBTRGI
|-
|Pin AF1
|TBDTIM2_CH1/TIM2_ETR
|-
|Pin AF2
|TBDSAI4_D2
|-
|Pin AF3
|TBDSDMMC1_CDIR
|-
|Pin AF4
|TBDCEC
|-
|Pin AF5
|TBDSPI1_NSS/I2S1_WS
|-
|Pin AF6
|TBDSPI3_NSS/I2S3_WS
|-
|Pin AF7
|TBDSPI6_NSS
|-
|Pin AF8
|TBDUART4_RTS/UART4_DE
|-
|Pin AF9
|TBDSDMMC2_D5
|-
|Pin AF10
|TBDSDMMC2_CDIR
|-
|Pin AF11
|TBDSDMMC1_D5
|-
|Pin AF12
|TBDSAI4_FS_A
|-
|Pin AF13
|TBDUART7_TX
|-
|Pin AF14
|TBDLCD_R1
|-
|Pin AF15
|VBUS_OTG_IN
|S
|TBD
|
|
|VBUS_SW
|S
|TBD
|
|
----
[[Category:{{{nome-som}}}ETRA]]
8,226
edits