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<section end="History" />
<section begin="Body" />
== Processor and memory subsystem ==
The heart of ETRA module is composed by the following components:
* ''STM32MP1'' SoC application processor
* Power supply unit
* DDR3L memory banks
| align="center" style="background:#f0f0f0;" |'''L2 Cache'''
| align="center" style="background:#f0f0f0;" |'''DDR3'''
| align="center" style="background:#f0f0f0;" |'''MCU'''
| align="center" style="background:#f0f0f0;" |'''Graphics Acceleration'''
| align="center" style="background:#f0f0f0;" |'''Temp grade'''
|-
| STM32MP151DAB3 STM32MP151 || 1 ||650MHz<br>800 MHz ||256 KB ||16/32 bit @ 533 MHz |32 bit Arm Cotex Cortex M4||||-40 +125°C|-| STM32MP153DAB3 || 2 ||800 MHz ||256 KB ||32 bit @ 533 MHz |32 bit Arm Cotex M4209MHZ|||| -40 +125°C
|-
| STM32MP157CAB3 STM32MP153 || 2 ||650 650MHz<br>800 MHz ||256 KB ||16/32 bit @ 533 MHz |32 bit Arm Cotex Cortex M4@209MHZ||3D: Vivante || -40 +125°C
|-
|STM32MP157DAB1STM32MP157 ||2||650MHz<br>800 MHz||256 KB||16/32 bit @ 533 MHz|32 bit Arm Cotex Cortex M4@209MHZ||3D: VivanteGC Nano || -40 +125°C<br>-20 +105°C
|-
|+ align="bottom" style="caption-side: bottom" | Table: STM32MP1 models comparison
| '''Size max'''||1 GB
|-
| '''Width'''||32 16 bit
|-
| '''Speed'''||533 MHz
|-
|}
NOTE: the SDMMC2 pins are shared with other interfaces. Make shure to not populate the other devices to use this peripheral. The use of LCD interface limit the bus with width to 4 bit
The eMMC and NAND flashes are surmountedoverlapped, only one at time and can be alternatively populated.
=== Memory map ===