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Design overview (AXEL ULite)

61 bytes added, 15:53, 16 August 2019
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== Introduction ==
The heart of AXELULite AXEL ULite system-on-module (SOM for short) is composed by the following components:
* NXP i.MX6UL application processor
* Power supply unit
* 1x 204 pin SODIMM connector with interfaces signals
This article shortly describes the main AXELULite AXEL ULite components.
== Processor Info ==
** SD/SDIO/MMC
** Serial buses: USB, UART, I²C, SPI, CAN, ...
* Security BlockModule, including:** TRNGTrue and Pseudo Random Number Generator** Crypto Engine (AES with DPA, TDES/SHA/RSA)Cryptographic Acceleration and Assurance Module** Secure Non-Volatile Storage with Violation/Tamper Monitor** Secure Bootdetection and reporting
AXELULite AXEL ULite can equip the entire range of i.MX6UL SOC models with the following main features:
* Package: 14 x 14 mm, 0.8 pitch, BGA
| '''CPU connection'''||Multi-mode DDR controller (MMDC)
|-
| '''Size min'''||512 256 MB
|-
| '''Size max'''||4 GB 512 MB
|-
| '''Width'''||64 16 bit
|-
| '''Speed'''||533 400 MHz
|-
|}
== NOR flash bank ==
NOR flash is a Serial Peripheral Interface (SPI) device. This device is connected to the eCSPI ECSPI1 channel 5 and by default it acts can act as boot memory. The following table reports the NOR flash specifications:
{| class="wikitable" |
|-
| '''CPU connection'''||eCSPI channel 5ECSPI1
|-
| '''Size min'''||8 MB
|-
| '''Size max'''||64 32 MB
|-
| '''Chip select'''||ECSPI5_SS0ECSPI1_SS0
|-
| '''Bootable'''||Yes
|-
| '''Chip select'''||NANDF_CS0
|-
| '''Interface'''||asynchronous
|-
| '''technology'''||SLC
|-
| '''Bootable'''||Yes
|-
|}
 
== Memory map ==
For detailed information, please refer to chapter 2 “Memory Maps” of the i.MX Applications Processor Reference Manual.
== Power supply unit ==
AXELULite AXEL ULite embeds all the elements required for powering the unit, therefore power sequencing is self-contained and simplified. Nevertheless, power must be provided from carrier board, and therefore users should be aware of the voltage ranges power supply can assume as well as all other parameters. Three supported voltage ranges are available. For more details please refer to [[Power_Power (AXELULiteAXEL ULite)|this page]].
==Bootstrap options==
For more details about bootstrap options, please refer to [[Boot_process_and_bootstrap_configuration_Boot process and bootstrap configuration (AXELULiteAXEL ULite)|this page]].
== SOM connector ==
All interface signals AXELULite AXEL ULite provides are routed through SODIMM DDR3 204 pin (named J2). The dedicated carrier board must mount the counterpart [[#Integration_guide_(AXEL_ULite)SODIMM204 mating connector|mating connector ]] and connect the desired peripheral interfaces according to [[Pinout_Pinout (AXELULiteAXEL ULite)|AXELULite AXEL ULite pinout specifications]].
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