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== Introduction ==
The heart of AXELULite AXEL ULite system-on-module (SOM for short) is composed by the following components:
* NXP i.MX6UL application processor
* Power supply unit
* 1x 204 pin SODIMM connector with interfaces signals
This article shortly describes the main AXELULite AXEL ULite components.
== Processor Info ==
The i.MX 6UltraLite (i.MX6UL ) processor features NXP’s advanced implementation of the ARM® Cortex®-A7, a single-core cost-effective and power-efficient solution, which operates at speeds up to 1696 MHz.2 GHz. They include 2D This SOC includes a deep encryption and 3D graphics processors, 1080p video processingsecurity capability, a complex and flexible boot management and an integrated power management. As a result, the i.MX6 MX6UL devices are able to serve a wide range of applications including:* Automotive driver assistance, driver information, and infotainment* Multimedia-centric smart mobile devicesIndustrial/IoT gateways* Instrument clusters, and portable medical devices.* E-Readers, smartbooks, tabletsDataloggers* Intelligent industrial motor Remote control, industrial networking, and machine vision* IP and Smart cameraunits
* Human-machine interfaces
* Medical diagnostics Safety blocks for IoT data manipulation and imaging* Digital signage* Video and night vision equipment* Multimedia-focused products* Entertainment and gaming appliancesstreaming
The i.MX6 MX6UL application processor is composed of the following major functional blocks:* Single ARM Cortex-A9 A7 MPCore 1x/2x/4x CPU Processor, featuring:** 1 Megabyte 128KB unified L2 cache shared by all CPU cores
** NEON MPE coprocessor
** External memories interconnect
* Connectivity peripherals, including
** PCIe** SATA2xRMII - Ethernet 10/100 interfaces
** SD/SDIO/MMC
** Serial buses: USB, UART, I²C, SPI, CAN, ...* Security Module, including:** True and Pseudo Random Number Generator** Cryptographic Acceleration and Assurance Module** Secure Non-Volatile Storage with Violation/Tamper detection and reporting
== RAM memory bank ==
| '''CPU connection'''||Multi-mode DDR controller (MMDC)
|-
| '''Size min'''||512 256 MB
|-
| '''Size max'''||4 GB 512 MB
|-
| '''Width'''||64 16 bit
|-
| '''Speed'''||533 400 MHz
|-
|}
== NOR flash bank ==
NOR flash is a Serial Peripheral Interface (SPI) device. This device is connected to the eCSPI ECSPI1 channel 5 and by default it acts can act as boot memory. The following table reports the NOR flash specifications:
{| class="wikitable" |
|-
| '''CPU connection'''||eCSPI channel 5ECSPI1
|-
| '''Size min'''||8 MB
|-
| '''Size max'''||64 32 MB
|-
| '''Chip select'''||ECSPI5_SS0ECSPI1_SS0
|-
| '''Bootable'''||Yes
|-
| '''Chip select'''||NANDF_CS0
|-
| '''Interface'''||asynchronous
|-
| '''technology'''||SLC
|-
| '''Bootable'''||Yes
|-
|}
== Power supply unit ==
AXEL ULite embeds all the elements required for powering the unit, therefore power sequencing is self-contained and simplified. Nevertheless, power must be provided from carrier board, and therefore users should be aware of the voltage ranges power supply can assume as well as all other parameters. Three supported voltage ranges are available. For more details please refer to [[Power (AXEL ULite)|this page]].
== SOM connector ==
All interface signals AXELULite AXEL ULite provides are routed through SODIMM DDR3 204 pin (named J2). The dedicated carrier board must mount the counterpart [[#Integration_guide_(AXEL_ULite)SODIMM204 mating connector|mating connector ]] and connect the desired peripheral interfaces according to [[Pinout_Pinout (AXELULiteAXEL ULite)|AXELULite AXEL ULite pinout specifications]].