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PCIe section update for DESK-MX6-L release
<section begin="History" />
{| style="border-collapse:collapse; "
!colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History
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!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Version!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Issue Date!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Notes
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|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|1.0.0|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|Oct 2020|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|First DESK release|-| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |3.0.0| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Feb 2022| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |3.0.0 DESK release
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<section end="History" /><section begin="Body" />
==Peripheral PCI express==
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[ 0.443763867331] PCI: CLS 0 bytes, default 64[ 0.459987972739] imx6q-pcie 1ffc000.pcie: no reserved region node.[ 0.460090] imx6q-pcie 1ffc000.pcie: 1ffc000.pcie supply epdev_on not found, using dummy regulator[ 01.460415032962] OF: PCIimx6q-pcie 1ffc000.pcie: host bridge /soc/pcie@1ffc000 ranges:[ 01.460451033016] OFimx6q-pcie 1ffc000.pcie: PCI: IO 0x01f800000x0001f80000..0x01f8ffff 0x0001f8ffff -> 0x000000000x0000000000[ 01.460470033044] OF: PCIimx6q-pcie 1ffc000.pcie: MEM 0x010000000x0001000000..0x01efffff 0x0001efffff -> 0x010000000x0001000000[ 01.709248126180] imx6q-pcie 1ffc000.pcie: phy link never came Link up[ 01.712328126187] imx6q-pcie 1ffc000.pcie: failed to initialize hostLink: Gen2 disabled[ 01.712343126196] imx6q-pcie 1ffc000.pcie: unable to add pcie port.Link up, Gen1[ 01.712571126376] imx6q-pcie: probe of 1ffc000.pcie failed with error -110: PCI host bridge to bus 0000:00
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[ 24.459055120926] ehci-pci: EHCI PCI platform driver
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</pre>
The PCIe usage is strictly related to the peripheral type connected to the PCIe slot. Then, the peripheral type defines the linux Linux commands used for the accessing (hiding the PCIe bus commands)
=== Additional information ===