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→Mezzanine board connectors (J53/J54)
!Notes
|-
|1||J16||UART2_RX_DATA||UART2_RX||I/O||IO_3.3V||[1], [2]
|-
|2||H14||UART2_nRTS||UART2_RTS||I/O||IO_3.3V||[1], [2]
|-
|3||J17||UART2_TX_DATA||UART2_TX||I/O||IO_3.3V||[1], [2]
|-
|4||J15||UART2_nCTS||UART2_CTS||I/O||IO_3.3V||[1], [2]
|-
|5||F17||UART5_TX_DATA||UART5_TX / I2C2_SCL||I/O||IO_3.3V||
|6||G13||UART5_RX_DATA||UART5_RX / I2C2_SDA||I/O||IO_3.3V||
|-
|7||D14||MEZZANINE_GP0||GPIO / PWM||I/O||IO_3.3V||[13], [24]
|-
|8||A14||MEZZANINE_GP1||GPIO||I/O||IO_3.3V||[13], [24]
|-
|9||B16||MEZZANINE_GP2||GPIO||I/O||IO_3.3V||[13], [24]
|-
|10|| ||DGND||Ground||-||-||
|}
[1] '''This signal acts as bootstrap configuration flag''' and '''may group of signals can be pulled up or down with 10kOhm resistor'''. '''Do not drive these signals until CPU_PORn is deasserted'''. For more details please refer configured to [[#Handling bootstrap signals|implement this section]]alternative functions:*I2C4*CAN2*SPI3 (CS0).
[2] Not available is DWM WIFI present [3] '''This signal acts as bootstrap configuration flag''' and '''may be pulled up or down with 10kOhm resistor'''. '''Do not drive these signals until CPU_PORn is deasserted'''. For more details please refer to [[#Handling bootstrap signals|this section]]. [4] Not available if 24-bit LCD interface is used.
{|class="wikitable" style="text-align: center;"
|3||-||3V3_AUX||-||Power||-||[[Power_supply_unit_(PSU)_and_voltage_domains_(SBC_Lynx)|Power supply of AUX_3.3V domain]]
|-
|4||-||VDDA_ADC_3P3||-||Power||-||[[Power_supply_unit_(PSU)_and_voltage_domains_(SBC_Lynx)|Power supply of ADC_3.3V domain]]<br>[35]
|-
|5||L15||GPIO1_IO01||GPIO / ADC||I/O||ADC_3.3V||12-bit ADC
|10||-||DGND||Ground||-||-||
|}
[35] '''To be used for voltage reference only'''.
====Handling bootstrap signals====
MEZZANINE_GP0, MEZZANINE_GP1 and MEZZANINE_GP2 are connected to LCD_DATA19, LCD_DATA22 and LCD_DATA23 respectively. As such, they act as bootstrap configuration signals as well. They can be used by application software freely and the can be connected to user's application circuitry. However, '''any electrical interference during the processor reset cycle must be avoided'''.