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→Ethernet connector (J16)
=Introduction=
This document details connectors, buttons and switches that equip SBC Lynx board. '''Please note that not all of them are available on all models'''.
For some connectors, information related to the internal connections to the processor are provided. In these cases, 14x14mm-package processor's balls references are indicated.
The following table lists connectors, buttons and switches available on SBC Lynx.
|4||-||DGND||Ground||-||-||-
|}
J42 connector is compatible with [http://www.ftdichip.com/Support/Documents/DataSheets/Cables/DS_TTL-232RG_CABLES.pdf FTDI TTL-232RG-VIP-WE cable]. To connect it, please use this wiring:
*J42.1: yellow wire
*J42.2: orange wire
*J42.3: red wire
*J42.4: black wire
==Ethernet connector (J16)==
J16 is a standard RJ45 10/100BaseT Ethernet connector - incorporating magnetics - connected to the Ethernet controller and PHY.
J16 integrates a green status LED providing connection information:
*LED on: link established
*LED blinking: activity.
==Mezzanine board connectors (J53/J54)==
{| class="wikitable" |width="100%"
| [[File:SBC Lynx-J53-J54.png|thumb|center|300px|J53-J54]]
| [[File:SBCLYNX_ADDON_XUAL Mounted.JPG|thumb|center|300px|Example of mezzanine usability]]
|}
[5] '''To be used for voltage reference only'''.
===Handling bootstrap signals===
MEZZANINE_GP0, MEZZANINE_GP1 and MEZZANINE_GP2 are connected to LCD_DATA19, LCD_DATA22 and LCD_DATA23 respectively. As such, they act as bootstrap configuration signals as well. They can be used by application software freely and the they can be connected to user's application circuitry. However, '''any electrical interference during the processor reset cycle must be avoided'''.
There are different solutions to comply with this requirement. The following image shows a concept solution for this problem.
{| class="wikitable" |width="100%"
| [[File:SBC Lynx-J45-52.png|thumb|center|300px|J45]]
| [[File:XUAE-side-mount.png|thumb|center|300px|example of possible connections on J45]]
| [[File:Mech-design-XUAE-bottom.png|thumb|center|300px|J52]]
| [[File:SBC-Lynx-onepiece-bottom.png|thumb|center|300px|example of possible connections on J52]]
|}
| 13||-||DGND||Ground|| || ||-
|-
| 15||B9||LCD_DATA00|||| Output || IO_3.3V ||-[3]
|-
| 17||A9||LCD_DATA01|||| Output || IO_3.3V ||-[3]
|-
| 19||E10||LCD_DATA02|||| Output || IO_3.3V ||-[3]
|-
| 21||D10||LCD_DATA03|||| Output || IO_3.3V ||-[3]
|-
| 23||C10||LCD_DATA04|||| Output || IO_3.3V ||-[3]
|-
| 25||B10||LCD_DATA05|||| Output || IO_3.3V ||-[3]
|-
| 27||A10||LCD_DATA06||UART7_CTS_B|| Output || IO_3.3V ||-[3]
|-
| 29||-||DGND||Ground|| || ||-
|-
| 31||D11||LCD_DATA07||UART7_RTS_B|| Output || IO_3.3V ||-[3]
|-
| 33||B11||LCD_DATA08||FLEXCAN1_TX|| Output || IO_3.3V ||-[3]
|-
| 35||A11||LCD_DATA09||FLEXCAN1_RX|| Output || IO_3.3V ||-[3]
|-
| 37||E12||LCD_DATA10||FLEXCAN2_TX / SAI3_RX_SYNC|| Output || IO_3.3V ||-[3]
|-
| 39||D12||LCD_DATA11||FLEXCAN2_RX / SAI3_RX_BCLK|| Output || IO_3.3V ||-[3]
|-
| 41||C12||LCD_DATA12||SAI3_TX_SYNC|| Output || IO_3.3V ||-[3]
|-
| 43||-||DGND||Ground|| || ||-
| 59||-||DGND||Ground|| || IO_3.3V ||-
|-
| 2||B12||LCD_DATA13|| SAI3_TX_BCLK / USDHC2_RESET_B || Output || IO_3.3V ||-[3]
|-
| 4||A12||LCD_DATA14|| SAI3_RX_DATA / USDHC2_DATA4 || Output || IO_3.3V ||-[3]
|-
| 6||D13||LCD_DATA15|| SAI3_TX_DATA / USDHC2_DATA5 || Output || IO_3.3V ||-[3]
|-
| 8||C13||LCD_DATA16|| UART7_TX / USDHC2_DATA6 || Output || IO_3.3V ||-[3]
|-
| 10||B13||LCD_DATA17|| UART7_RX / USDHC2_DATA7 || Output || IO_3.3V ||-[3]
|-
| 12||A13||LCD_DATA18|| PWM5_OUT / USDHC2_CMD|| Output || IO_3.3V ||-[3]
|-
| 14||D14||LCD_DATA19|| PWM6_OUT / USDHC2_CLK || Output || IO_3.3V ||-[3]
|-
| 16||C14||LCD_DATA20|| ECSPI1_SCLK / USDHC2_DATA0 || Output || IO_3.3V ||SPI1 is available only if NOR is not mounted, [3]
|-
| 18||B14||LCD_DATA21|| ECSPI1_SS0 / USDHC2_DATA1 || Output || IO_3.3V ||SPI1 is available only if NOR is not mounted, [3]
|-
| 20||A14||LCD_DATA22|| ECSPI1_MOSI / USDHC2_DATA2 || Output || IO_3.3V ||SPI1 is available only if NOR is not mounted, [3]
|-
| 22||B16||LCD_DATA23|| ECSPI1_MISO / USDHC2_DATA3|| Output || IO_3.3V ||SPI1 is available only if NOR is not mounted, [3]
|-
| 24||-||DGND||Ground|| || ||-
[2] This signal can be routed here instead of connector J48. Please refer to the [mailto:sales@dave.eu Sale Deparment] for more details.
[3] LCD_DATAx signals act as bootstrap configuration pins as well. They can be used by application software freely and they can be connected to user's application circuitry. However, '''any electrical interference during the processor reset cycle must be avoided'''. Please see [[#Handling bootstrap signals|Handling bootstrap signals]] section for more details.
==DWM WiFi/Bluetooth module connector (J46)==
=====RS232 on DB9 (J34, J21)=====
{| class="wikitable" | width="100%"|[[File:SBC Lynx-J34.png|thumb|center|300px|J34]] |[[File:SBC Lynx-J21.png|thumb|center|300px|J21]]|}
{|class="wikitable" style="text-align: center;"
=====RS232 on Phoenix 1755749 MSTBVA2.5/3-G5.08 (vertical; J38, J39)=====
{| class="wikitable outercollapse" | width="100%"|[[File:SBC Lynx-J38.png|thumb|center|300px|J38]] |[[File:SBC Lynx-J39.png|thumb|center|300px|J39]]|}
{|class="wikitable" style="text-align: center;"
===CAN (J40 or J21)===
{| class="wikitable outercollapse" | width="100%"|[[File:SBC Lynx-J40.png|thumb|center|300px|J40]] |[[File:SBC Lynx-J21.png|thumb|center|300px|J21]]|}
CAN interface is associated to the i.MX6UL's FLEXCAN1 controller. Transceiver is Texas Instruments SN65HVD23x.
